摘要
现代微处理器设计中,多级Cache是弥补CPU和存储器之间速度差异的有效途径之一,其中二级Cache对于提高存储系统的性能有着重要的作用。提出了一种支持多处理器系统的32位RISC处理器"龙腾"R2的二级Cache单元的设计方案,讨论了如何用MEI协议保证存储一致性,以及二级Cache控制器的设计和优化方法。仿真和综合结果证明,该设计满足处理器的要求。
In the design of modern microprocessor, multi-level cache is one of the most popular methods to solve the problem of the speed difference between the CPU and the memory, and the 12 cache has the decisive effect on the performance of memory system. The I2 cache unit of “longTeng”R2 is presented, which is a 32-bit RISC microprocessor, discusses the approach of design and optimization of the 12 cache controller, and the implementation of the MEI protocol, which is used to keep memory consistency. The result of simulation and synthesis shows that the design fulfills the system demand.
出处
《科学技术与工程》
2008年第9期2356-2359,2364,共5页
Science Technology and Engineering
基金
国家自然科学基金(60513107)资助
