摘要
对组合电路连线上的信号值提出用主值Z和辅值F表示,并提出用主值故障和辅值故障表示组合电路中的固定型故障模型.文中阐述了对主值故障进行测试生成的原理方法.该方法使各类基本门电路具有统一形式的功能描述,适用于由多种类型基本门电路构成的组合电路.
A new method of defining signal values in a combination circuit by main value and complementary value is proposed in this paper.The use of main values and complementary values leads to a general description of different basic gate functions.Then main value faults and complementary valu faults are defined and used for describing stuck-at faults.The problem of test generation is discussed in detail, which makes test generation steps easier and faster especially for circuits composed of multi-type basic gates.
关键词
组合电路
真值表
计算机
测试
combination circuits
truth table
test generation