期刊文献+

A Novel Hybrid DPWM for Digital DC-DC Converters

一种适用于DC-DC变换器的新型混合式数字脉宽调制器(英文)
在线阅读 下载PDF
导出
摘要 We present a new hybrid digital pulse-width modulator (DPWM) for digital DC-DC converters that employs a ring-oscillator/counter structure. Based on a temperature/process compensation technique and a novel digital controller, the proposed DPWM can not only offer temperature/process-independent pulse widths, but also operate at a much higher clock frequency than the existing delay-line/counter DPWM structure. Post-simulation results show that with our DPWM, the system clock frequency reaches 156.9MHz while the worst variation,in a temperature range of 0 to 100℃under all process corners,is only± 9.4%. 提出了一种新型的适用于DC-DC变换器的混合式数字脉宽调制器.该脉宽调制器基于混合环路振荡器/计数器的结构.与已有的延迟线/计数器结构相比,由于该数字脉宽调制器采用了温度/工艺补偿技术和一种新型的数字控制器,使其不仅可为DC-DC变换器提供一个不随温度/工艺角变化的时钟,而且可以工作在更高的时钟频率,适用于高频应用场合.后仿结果表明该混合式数字脉宽调制器工作的时钟频率可达到156.9 MHz ,并且在0 ~100℃的温度范围内及所有工艺角下的最大偏移只有±9.4 %.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第2期275-280,共6页 半导体学报(英文版)
关键词 DPWM ring oscillator DC-DC converter 数字脉宽调制器 环路振荡器 DC-DC变换器
  • 相关文献

参考文献14

  • 1Wu A M, Xiao J, Markovic D, et al. Digital PWM control: application in voltage regulator models. IEEE PESC Conference, 1999:7.
  • 2Wei G, Horowitz M. A low power switching power supply for selfclocked systems. International Symposium on Low Power Electronics Design, 1996 : 313.
  • 3Henze C P. Power converter with duty ratio quantization. US Patent, 4630187,1986.
  • 4Dancy A P,Chandrakasan A P. Ultra low power control circuits for PWM converters. IEEE PESC Conference,1997:21.
  • 5Xiao J, Peterchev A V, Sanders S R. Architecture and IC implementation of a digital VRM controller. IEEE PESC Conference, 2001 : 38.
  • 6Patella B J, Prodic A, Zirger A, et al. High-frequency digital PWM contoller IC for DC-DC converters. IEEE Trans Power Electron, 2003,18(1) :438.
  • 7Dancy A P, Amirtharajah R, Chandrakasan A P. High-efficiency multiple-output DC-DC conversion for low-voltage systems. IEEE Trans VLSI System,2000,8(6):252.
  • 8Yah W, Luong H C. A 900-MHz CMOS low-phase-noise voltagecontrolled ring oscillator. IEEE Trans Circuits Syst II:Analog and Digital Signal Processing,2001,48(2) :216.
  • 9Razavi B. Design of analog CMOS integrated circuits. New York: Mc-Graw-Hill, 2001.
  • 10Weigandt T. Low-phase-noise, low-timing-iitter design techniques for delay cell based VCOs and frequency sythesizers. PhD Dissertation, Univiersity of California, Berkeley, 1998.

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部