摘要
为了降低超大规模集成电路（ＶＬＳＩ）测试中的测试产生和测试应用代价，本文提出了一种低成本的测试码自动产生算法──临界路径跟踪测试产生（ＣＰＴＴＧ）．本文主要从算法的搜索策略、扇出源的临界性确定及测试产生过程中的加速技术三个方面，介绍ＣＰＴＴＧ的主要思想和关键技术．文中给出了ＣＰＴＴＧ对国际通用的１０个组合电路范例的实验结果，表明了ＣＰＴＴＧ可以在较短时间内获得具有较高故障覆盖率的较小测试集．
To decrease the costs of test generation and test application in VLSItesting, a low cost algorithm for automatic test generation-critical path tracingtest generation(CPTTG) is presented in this paper. The basic ideas and key techniques of CPTTG are described from three aspects, search strategies of the algorithm, criticality determination of fanout stems and accelerated techniques in testgeneration. The experimental results of CPTTG for ISCAS'85 10 benchmark circuits are offered in this paper, which demonstrates that CPTTG can obtain less testpatterns with high fault coverage in shorter time.
出处
《计算机学报》
EI
CSCD
北大核心
1997年第8期759-768,共10页
Chinese Journal of Computers
基金
国家自然科学基金
关键词
测试产生
故障模型
VLSI
测试码
算法
Test generation, test application, fault model, critical path tracing method.
