摘要
用普通基比特串行乘法电路实现数字视频广播(DVB)中(204,188)RS码译码,使电路大大简化,并保持译码速率与视频信号比特和码速率一致,电路整齐规则,便于FPGA实现或专用集成电路设计,具有推广实用价值。
Using the bit serial multiplication circuits in conventional basis to implement the （204, 188 ） RS decoding for Digital Video Broadcasting （DVB） standard makes the decoding circuits simplified and keeps the decoding rate accordance with the bit and code rate of video signal. The decoding circuits are tidy and regular, so it is practical for the FPGA implementation or ASIC designing.
出处
《电讯技术》
2008年第2期61-67,共7页
Telecommunication Engineering
关键词
数字视频广播
RS码译码
FPGA
普通基比特串行乘法电路
DVB
decoding of Reed - Solomon code
FPGA
bit serial multiplication circuits in conven- tional basis
