摘要
介绍了一种基于直接数字波形合成技术的通用雷达回波模拟器。通过加载数据波形,该模拟器可以实现波形数据回放,也可产生各种标准信号波形。该模拟器以FPGA为控制核心,利用大容量FLASH作为数据存储介质,在接口通用性、控制逻辑重配置和器件兼容性3个方面作了专门设计。该模拟器具有良好的通用性和友好的用户交互接口,给出了本模拟器所模拟的面目标成像结果和产生的Chirp信号脉压结果。
In this paper, one general radar echo simulator based on DDWS technology is introduced. After the waveform data loading, the simulator can realize waveform data replay and generate variant waveforms. The control core is held by one FPGA and mega - byte FLASH is used as storage unit. The general interface, control logic reprogrammable and device coherent are specially designed. This simulator has tabloid general usage and sodality user＇s interface. At the end of this paper, one image about surface target and the chirp signal＇s compression result is presented.
出处
《现代雷达》
CSCD
北大核心
2007年第10期84-86,90,共4页
Modern Radar
