摘要
流水线自适应数字滤波器因为有反馈环路而不同于普通流水线滤波器,采用弛豫超前技术对最小均方(LMS)自适应滤波器的失调误差和自适应时间常数进行了流水线分析。利用MATLAB/Simulink中DSPBuilder模块库设计了不同延迟参数下滤波器的性能。最后应用FPGA的设计软件QuartusII分析了流水线自适应滤波器的时钟速度和消耗逻辑单元数。实验表明:选取合适的延迟参数可以显著提高自适应滤波系统的时钟速度。
The designs of pipelining adaptive digital filters are different from ordinary pipelining filters by its feedback loop, the technology of delay leading transfer was utilized of maladjustment error and step size parameter for LMS filters. Then analyzed the performance of all kinds of delay parameters in MATLAB/Simulink of module library of DSP Builder. In the end, the clock frequency and logic elements were simulated in the FPGA software QuartusⅡ. The result shows appropriate delay parameters can obviously increase the clock frequency of adaptive filter＇s system.
出处
《微计算机信息》
北大核心
2007年第17期223-224,250,共3页
Control & Automation
基金
中南大学文理基金(0601053)
