摘要
提出了一种改进的用于片上集成的USB2.0控制器的数据通道结构,运行时将有限的数据缓冲资源动态分配和实时回收,在增加少量RAM的前提下,显著改善了数据通道的吞吐量.该设计成功地应用于家庭网关SoC平台中,测试结果表明,该结构与具有同样大小缓冲区的现有数据通道相比,吞吐量平均提高63%,对RAM资源的利用率平均达到95%以上.
A novel architecture of data channel for on chip communication used in USB 2.0 device controller integrated to SoC is proposed. Through dynamic allocating and reclaiming limited channel buffer resource on runtime, channel throughput is obviously improved without obviously increasing RAM size. This novel channel architecture has been successfully applied to home network SoC; platform. Testing result shows that compared to traditional channel architecture the present architecture has improved the throughput by 63 % in average; meanwhile the average usage ratio of buffer resource of more than 95 % has been obtained.
出处
《复旦学报（自然科学版）》
CAS
CSCD
北大核心
2007年第1期76-80,共5页
Journal of Fudan University：Natural Science
基金
上海-应用材料研究与发展基金资助项目(065A10)
关键词
片上通信
USB2.0
数据通道
吞吐量
动态分配和回收
on-chip communication
USB 2.0
data charmel
throughput
dynamically allocation and reclaiming
