摘要
介绍了一种8位RISCMCUIP核的体系结构,采用自顶向下的设计思想对其进行模块划分,分析了流水线及跳转指令操作的实现,提出建立虚拟指令存储器模块对MCUIP核仿真的方案,并给出对虚拟指令存储器初始化的方法,该方法提高了MCUIP软核仿真的效率。
According to the top-down design method, this paper introduces the system architecture of one 8-bit RISC MCU IP core, analyzes the technique for realization of pipeline and jump-instruction. It presents a plan of building a virtual instruction memory module for simulation of MCU IP core, and a method to initial the memory are shown, to advance simulation efficiency of MCU IP core.
出处
《计算机工程》
CAS
CSCD
北大核心
2007年第6期248-249,共2页
Computer Engineering
