摘要
本文报道了一种超高速ＥＣＬ静态二分频器；介绍了该分频器的核心器件─—ＮＰＮ晶体管的结构和实现该结构的有关先进工艺，包括深槽隔离、多晶硅发射极、钻硅化物和浅结薄基区等；使用这种多晶硅发射极晶体管，３ｐｍ特征尺寸设计的１９级环形振荡器的平均门延迟小于５０ｐｓ．讨论了提高分频器工作频率的一些有效方法并给出了３．２ＧＨｚ硅静态分频器的电路设计和版图设计．
This paper presents a very high speed ECL static frequency divider circuit,the structure of poly-St emitter NPN bipolar device is given and the key technologies such as salicide contact,deep trench isolation,shallow junction and thin base formation are described. By using this advanced St bipolar technology,the average gate delay less than 50ps is achieved for 19-stage ring oscillator with 3pm feature size. The circuit and layout design for a 1/2 divider as well as some strategies for enhancing performance are discussed in detail,and the 1/2 divider has got a maximum operating frequency of 3.2GHz.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1997年第2期89-92,共4页
Acta Electronica Sinica
