摘要
A low-power IC for function electrical stimulation （FES） of nerves is designed for an implantable system and fabricated in CSMC＇s 0.6μm CMOS technology. The IC can be used for stimulating animals＇ spinal nerve bundles and other nerves connected with a cuff type electrode. It consists of a pre-amplifier,a main amplifier,and an output stage. According to the neural signal spectrum,the bandwidth of the FES signal generator circuit is defined from 1Hz to 400kHz. The gain of the circuit is about 66dB with an output impedance of 900. The 1C can function under a single supply voltage of 3-5V. A rail-to-rail output stage helps to use the coupled power efficiently. The measured time domain performance shows that the bandwidth and the gain of the IC agree with the design. The power consumption is lower than 6mW.
采用华润上华微电子公司0.6μmCMOS工艺设计了低功耗神经功能电激励集成电路.该电路适用于以卡肤电极作为激励电极的可植入式神经信号桥接系统,可以用来激励脊椎动物的脊髓神经或其他神经束.电路包括输入级差分预放大电路、增益级放大电路和输出电路.为满足体内植入式神经功能电激励的要求,该集成电路避免使用任何片外元件,实现了单片集成.根据神经信号的特点,神经功能激励电路的频率响应带宽设计为1Hz^400kHz,输出电阻为90Ω时的增益为66dB,可以在3~5V的工作电压下正常工作.采用满摆幅输出级提高了有效的激励电压输出.测试结果表明,电路的带宽和增益符合设计要求,直流功耗低于6mW,达到了设计目标.
基金
国家自然科学基金资助项目(批准号:90377013)
