摘要
介绍了一种高性能W ISHBONE/AMBA(先进的微处理机总线体系结构)AHB(AMBA高性能总线)总线桥的前端设计方法。通过对两种总线协议的分析得到设计方案,并使用硬件描述语言实现。仿真结果符合设计要求,在SM IC 0.18μm工艺下对电路进行综合,给出了综合后的面积和功耗结果。64位宽的总线桥占用芯片面积不足0.09 mm2,工作频率可以达到750 MHz以上。
A front-end design method of high performance WISHBONE/AMBA AHB bus bridge is introduced. The design concept is obtained through careful analysis and is implemented using hardware description language . The simulation result indicates that the design meets the requirement , the circuit is synthesized using SMIC CMOS 0. 1 8 μm technology. The area and power consumption are got after synthesis. Less than 0.09 mm^2 chip area is occupied by a 64 bits bus bridge, and the clock frequency can be more than 750 MHz.
出处
《电子工程师》
2007年第1期18-20,共3页
Electronic Engineer
