摘要
在复杂的主从多点系统中，以微机为核心的各站之间的高速数据交换是必不可少的重要环节。本文介绍了用可编程逻辑阵列芯片实现ＲＳ－４８５高速串行同步通信的一种设计方法。所设计的接口电路克服了用标准接口芯片实现的接口电路中存在的一些问题，如死机、丢帧、传输数据率低及收发占用机时过长等问题。通过在实际系统中的大量检验，证明本文的设计思想具有较高的实用价值。
High-speed serial data transmission interfaces are very important in master-slave multipoint microcomputer systems. such as the RS-485 bus. but unfortunately. some problems appear frequently in application systems of the RS-485 circuits formed by the Standard Interface Chips (SIC). which include dead halt. drop-out frame. low data transfer rate and holding too long time etc. This paper introduces a design of the RS-485 high-speed serial synchronous interface formed by Programmable Logic Devices (PLD). which have overcome the above-mentioned problems. In the paper. the logic designs of transmitter. receiver and cyclic redundancy check are described and comparisons between interface for PLD and interface for SIC are made. A number of applications show that design methods of this paper is of great use for practical systems and the data transfer rate of interface designed with them is over 10MBPS.
出处
《系统工程与电子技术》
EI
CSCD
1996年第10期18-27,33,共11页
Systems Engineering and Electronics
关键词
RS-485总线
接口
可编程逻辑器件
Serial data transmission. Standard interface chip. Logic program design.
