摘要
阐述了GPS相关器的工作原理并用Verilog硬件描述语言实现的GPS数字相关器的全部设计,它由控制接口模块和相关通道组成,并在Modelsim6.0下后仿真通过。该电路用Altera的FPGA实现,工作正常,性能可靠,完全可以达到GPS接收机的工作要求,并可以采用VLSI实现。
This text has explained the operation principle of GPS Correlator and all design of GPS Correlator has been implemented with Verilog hardware description language and simulated under Modelsim 6.0. Implemented in FPGA of Altera, the circuit has a reliable performance and can reach the requirements of GPS receiver. Realized with Verilog language, the Correlator can be easily embedded into other FPGA system. And, it also can be realized with VLSL
出处
《电子器件》
EI
CAS
2006年第3期722-725,共4页
Chinese Journal of Electron Devices
