摘要
本文提出了一种大批量层叠封装(PoP)组装方法,这种方法利用了倒装芯片组装中已有的电子封装技术。本文讨论了多个挑战和考虑因素。许多文章[1、2、3]详细介绍了这一新型封装的要求和实例。本文将演示怎样使用自动贴装机和倒装芯片组装使用的选项,堆叠和组装这些模块。为适应底部CSP较大的球体尺寸及使用焊膏和助焊剂,对上述技术必须进行某些改动。堆叠要求的精度要高于标准SMT贴装。某些现有的SMT贴装机可以进行改进,采用相应的改动精确地高速贴装堆叠的CSP。这种方法在成本上非常有竞争力。我们还将他细分析部分测试工具的设计问题。这些测试工具是为了深入考察工艺和组装问题而研制的。
This article proposes an approach to high volume Package-on-Package （POP） assembly that leverages the existing electronics packaging technologies for flip chip assembly. Several challenges and considerations are discussed.
Several articles describe in detail the requirements as well as examples of this new package. This article will demonstrate how to stack and assemble these modules by using automated placement machines and options used for flip chip assembly. Some modifications are required to accommodate the larger ball size of the bottom CSP as well as the use of solder paste in addition to flux. Stacking requires more accuracy than standard SMT placement Some existing SMT assembly machines can be modified to accurately place stacked CSP＇ s at high speeds with the appropriate modifications. This approach can be very cost competitive..
We will also review the design of some test vehicles that were built to further examine process and assembly issues.
出处
《中国集成电路》
2006年第7期67-71,共5页
China lntegrated Circuit
关键词
叠封装
POP
助焊
高速组装
Package-on-Package, PoP, Fluxing, High-speed assembly.）
