摘要
FIR滤波器是一种被广泛应用的基本的数字信号处理部件.针对常用的软、硬件方法设计实现FIR滤波器存在的问题,提出采用M atlab的窗函数方法设计并在FPGA上高速并行实现严格线性相位FIR滤波器的方案.其可以方便地调整滤波器的阶数和系数,适合不同场合的应用.通过编程调试结果表明,该设计是可靠的,可作为高速数字滤波器设计的较好方案.
FIR filter is a basic process unit which is widely used in digital signal. Aiming at the problems in designing the FIR filter using software and hardware, a scheme is proposed which designs a FIR filter of strictly linear phase with window functions in Matlab and runs it on FPGA parallelly with high speed. The orders and coefficients of the filter may flexibly be adjusted to apply it in various applications. It is shown that the scheme is effective for designing high speed digital filter through programming and debugging.
出处
《应用科技》
CAS
2006年第6期83-86,共4页
Applied Science and Technology
