摘要
为克服条件跳转指令的缺陷,新一代超长指令字(VLIW)体系结构的数字信号处理器(DSP)提供了对条件执行指令的支持。为使得此类指令的优势得以充分发挥,该文设计并实现了一种基于hyperblock区域结构的编译框架。实验结果表明,该框架很好地提高了指令级并行度(ILP),减少了指令执行时间。
As a conditional jump nray cause significant code performance penalty, the architecture of recent VLIW DSPs offers support for conditional instructions. In order to exploit advantages of this kind of instructions, this paper proposes a compiler framework based on the hyperblock region. The results of the experiment denronstrate that this framework can improve ILP efficiently, and reduce the execution time greatly.
出处
《计算机工程》
CAS
CSCD
北大核心
2006年第11期106-108,共3页
Computer Engineering
基金
国家"863"计划基金资助项目(2004AA1Z1040)
