摘要
阐述了采用Alter公司的StratixⅡ系列FPGA设计高速FFT处理器的实现方法及技巧;充分利用其芯片的硬件资源,减少复杂逻辑,采用流水方式对复数数据实现了FFT运算;整个设计采用流水与并行方式尽量避免“瓶颈”的出现,提高系统时钟频率,达到高速处理;实验表明,此处理器既有专用ASIC电路的快速性,又有DSP器件灵活性的特点,适合用于高速数字信号处理。
The designing method and skill of the high-speed FFT processor based on Alter Stratix Ⅱ FPGA are introduced in this paper. To use sufficiently the hardware resource of the StratixⅡ FPGA and to reduce the complex logic, the serial mode is adopted to put the complex data into the operation of FFT. By using the serial and parallel architecture in the whole design, the bottleneck is avoided, the frequency of the system clock is increased and high-speed performance achieved. The experiment proves that the processor has both high-speed performance of the ASIC circuit and flexibility of the DSP component and it is suitable for high-speed digital signal processing.
出处
《合肥工业大学学报（自然科学版）》
CAS
CSCD
北大核心
2006年第5期536-539,共4页
Journal of Hefei University of Technology：Natural Science
