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基于神经网络算法的组合序列密码芯片 被引量:4

The Cipher Chip of Combining Stream Based on the Neural Network Algorithm
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摘要 序列密码一直是密码学中最重要的加密方式之一.现提出基于神经网络算法的序列密码加密芯片设计,在保留原序列良好统计特性基础上,使输出序列的周期性和线性复杂性均有增加.利用FPG A技术进行序列密码芯片电路设计,灵活运用现代电子设计方法实现了运算功能和时序分配.逻辑综合仿真结果验证了芯片电路的正确性.该研究结果有助于序列密码算法在信息安全及现代保密通信设备中的应用. Stream cipher has always been one of the most important encryption methods in cryptography. Now we bring in a stream cipher encryption chip design which is based on neural network algorithm and it not only contains the good statistics of m-sequence but also enhances the periodicity and linear complexity of the output sequences. We use FPGA technology to complete the stream cipher circuit design and the modem electronic design method to smoothly realize operation functions and sequential assignment. The result of logical synthesis simulation verifies the correctness of the chip circuit. This research is helpful to the application of stream cipher algorithm in information security and modem secure communication equipment.
出处 《电子学报》 EI CAS CSCD 北大核心 2006年第3期409-412,共4页 Acta Electronica Sinica
基金 哈尔滨市科学研究基金(No.2003AFXXJ022)
关键词 序列密码 神经网络 加密芯片 FPGA stream cipher neural network encryption chip FPGA
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参考文献7

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二级参考文献1

共引文献65

同被引文献43

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