摘要
介绍了扇形分裂漏磁敏传感器集成电路的设计,并由0．6μm CMOS工艺实现。该集成电路以扇形分裂漏磁敏MOS管作为磁敏传感单元,并包含两次工作模式的开关阵列预处理电路、相关二次取样电路(CDS)和数字控制电路。该传感器集成电路实现了测量磁场的功能,并实现了在屏蔽磁场的工作模式下对噪声信号进行校正的功能,有效地消除了磁敏传感器及其信号处理电路的噪声影响。在工作频率为10 kHz时,磁敏传感器的灵敏度为2．62 V/T。
The CMOS magnetic sensor integrated circuit with sectorial split drain magnetic field-effect transistor （MAGFET） is designed and developed in a 0. 6 μm standard CMOS technology. The design is c_onsisted of the sectorial split-drain magnetic field-effect transistor as the magnetic sensor cell, the pre-processing circuit with two functioning modes, the correlated double sampling （CDS） circuits and the digital controlling circuits. The sensor integrated circuit is designed to realize the measurement of magnetic field, as well as the noise-shaping with the mode of magnetic field shielding, and the noise of the sensor cell and the signal processingcircuit is greatly reduced. The sensitivity of the magnetic sensor integrated circuit is 2. 62 V/T at the working frequency of 10 kHz.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2006年第1期91-95,共5页
Research & Progress of SSE
基金
国家自然科学基金（NSFC）：90307009
