摘要
设计了一款主要应用于集成稳压器的精密CMOS带隙基准电路。在降低高频噪声、增强输出对电源纹波抑制能力的同时引入快速启动电路,改善了RC滤波电路限制基准启动速度的问题。采用HYNIX 0.5ΜM CMOS HSPICE模型进行仿真后表明,此款带隙基准电路在较宽的频带范围内,噪声只有8.5ΜV(RMS),电源抑制比(PSRR)为100 DB左右,启动时间在100ΜS以内。
The design of a novel CMOS band-gap reference circuit is adding a RC filter to the output, the circuit can reduce the noise at high freque presented in this paper. By ncy and increase the PSRR. What＇ s more, a fast startup circuit is suggested here to overcome the slow startup problem of other designs. The characteristics of the circuit are simulated by Hynix 0.5μm CMOS HSPICE models. Over a wide range of frequency, the noise is only 8.5μVrms, the PSRR is 100dB or so and the circuit reaches its steady state within 100 microseconds.
出处
《电子工程师》
2006年第2期5-8,共4页
Electronic Engineer
