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基于准浮栅技术的超低压运放及滤波器设计

Ultra-Low Voltage OPA and Filter Design Based on CMOS Quasi-Floating-Gate Transistors
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摘要 准浮栅MOS晶体管的工作原理、电气特性及等效电路的系统采用TSMC 0.25μm 2P5M CMOS工艺的CMOS准浮栅技术,提出了0.8 V运算放大器,最大直流开环增益可以达到76.3 dB,相位裕度为75°,单位增益频率为1.0 5 MHz.设计了0.8 V一阶CMOS开关电容高通滤波器,滤波器输入输出电压范围为0~0.8 V,截止频率为100 KHz. Based on the analysis of the principle, electric characteristic and equivalent circuits of quasi floating-gate transistors, a novel 0. 8V OPA and 0. 8 V Rail-to-Rail analog switch are proposed in TSMC 0. 2Stem 2PSM CMOS technology,the DC open-loop gain of the amplifier is 76.3dB, the phase margin is 75° and the unit gain width is 1.05 MHz. A 0.8V CMOS switch capacitor high pass filter is presented, and the simulated results show that filter's input and output characteristic is Rail-to-Rail.
出处 《电子器件》 EI CAS 2005年第4期733-735,739,共4页 Chinese Journal of Electron Devices
基金 国家自然科学基金项目资助(60476046) 国家预研基金资助(51408010601DZ01)
关键词 CMOS 准浮栅 超低电压 运放 模拟开关 滤波器 CMOS quasi-floating-gate ultra-low voltage OPA analog switch filter
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参考文献6

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