摘要
本文介绍了一种基于优化技术的单元级模拟集成电路综合方法，该方法采用模拟退火法同时进行拓扑选择和器件尺寸优化，克服了＂两步模式＂所固有的弊端，本文还构造了一种迭代策略以减小模拟退火法的计算量，按该方法开发的综合器能很好地完成单管放大器、电流镜、运算放大器、模拟乘法器、开关电源控制器等模拟集成电路单元的自动综合．
An optimization-based synthesis method for analog circuits is proposed. The simulated annealing algorithm(SA) is employed to do topology selection and device sizing simultaneously,which overcomes the shortage of the traditional two-step synthesis mode. Moreover,an iteration strategy is composed to reduce the computational cost of SA. Taking this methodology,a synthesizer is developed which performs well in synthesizing many analog cells, such as simple amplifiers, current mirrors, operational amplifiers, analog multipliers and switched-power controllers, etc.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1996年第8期72-75,共4页
Acta Electronica Sinica
基金
高等学校博士点专项科研基金
