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一种基于共享总线的冗余容错多处理器系统 被引量:4

一种基于共享总线的冗余容错多处理器系统
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摘要 定义了一种完全基于局部处理器的多处理器系统,讨论了系统的实现条件,提出了一种共享总线结构,建立了处理器域之间基于固定地址窗的信息交换机制,实现了无主多处理器系统。从而解决了高端应用中的设备的冗余备份问题,同时提供了灵活而且任意层次的系统级备份模式,具有最高的处理器安装密度以及信息处理能力。 A kind of multiprocessor system completely based on local processor is defined,the conditions how to realize the system are discussed,corresponding architecture which shared bus is put forward, data exchange mechanism based on fixed address window between processor domains is established, and finally the multiprocessor system without host processor is realized. The problem on the device redundancy in the high-end application is thoroughly solved, it supplies us with a redundancy mode which have flexible and any layer in system-level, with a highest assemble density on processor-card and computing ability of data.
机构地区 北京科技大学
出处 《微计算机信息》 北大核心 2005年第09Z期56-58,78,共4页 Control & Automation
基金 国家自然科学基金资助项目 编号:60375014
关键词 多处理器 无主的 共用总线 非透明桥 Multiprocessor,without host,Shared bus,Nontransparent bridge
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参考文献4

  • 1PICMG2.7.CompactPCI 6U Dual System Slot Specification R1.0.PICMG,2001.03.23.
  • 2宋克柱,杨小军,束礼宝,王砚方.冗余系统槽CompactPCI高可靠平台[J].系统工程与电子技术,2002,24(8):121-123. 被引量:4
  • 3王承忠 王欣 李光年 李牧 深圳市中兴通讯股份有限公司.一种实现双系统槽的装置与方法[P].中国发明专利,专利号:01105519.7.2002年10月9日.
  • 4康东明,李彤,丁有志,杨镇西,谢兵.用CPLD实现PCI总线仲裁器[J].半导体技术,2002,27(7):33-35. 被引量:2

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同被引文献14

  • 1Fu Zhongchuan,Chen Hongsong,Cui Gang.MICROTHREAD BASED (MTB) COARSE GRAINED FAULT TOLERANCE SUPERSCALAR PROCESSOR ARCHITECTURE[J].Journal of Electronics(China),2006,23(3):461-466. 被引量:3
  • 2C.A.F.De Rose, H-U Heiss, Barry Linnert, Distributed dynamic processor allocation for multicomputers. Parallel Computing 33 (2007) 145-158.
  • 3G.Gabrani, Tushar Mulkar, A quad-tree based algorithm for processor allocation in 2D mesh-connected multicomputers. Computer Standards & Interfaces 27 (2005)133-147.
  • 4Geunmo Kim, Hyunsoo Yoon, On Submesh Allocation for Mesh Muhicomputers:A Best-Fit Allocation and a Virtual Submesh Allocation for Faulty Meshes. IEEE Transaction on Parallel And Distributed Systems. VOL.9,NO.2 1998(175-184).
  • 5C.-Y. Chang, P. Mohapatra, Performance improvement of allocation schemes for mesh connected computers, Journal of Parallel and Distributed Computing 52 (1) (1998) 40 - 68.
  • 6I. Ababneh, An efficient free-list submesh allocation scheme for two-dimensional mesh-connected muhicomputers, Journal of Systems and Software 79(8) (2006) 1168-1179.
  • 7陈国良.并行计算-结构·算法·编程[M].北京:高等教育出版社,2001.9.
  • 8Tom Shanley.Don Anderson.PCI System Architecture[M].4th Edition.Mindshare Corperation,1999.
  • 9John L.Hennessy,David A.Patterson著,郑纬民等译:计算机系统结构-量化研究方法(第三版)电子工业出版社P367-372
  • 10James Reed and Naraig Manjikian :Cache Coherence Support in a Split-Transaction Bus for Prototyping of System-on-Chip Multiprocessors2004 IEEE. Regular Session F : Parallel Systems. NoC & SoC

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