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基于DSP和FPGA的视频编码器协同设计与算法优化实现 被引量：5

Hardware Design and Algorithm Optimization of Video Encoder Based on DSP and FPGA Techniques
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摘要 采用DSP和FPGA协同技术设计实现了一个高性能的MPEG 4视频编码器。FPGA模块完成视频采集、YUV分离、数据I/O等功能,而使用DSP专一进行视频压缩编码。针对DSP片内资源特点设计了片内存储器数据分配方案,并根据该方案优化了MPEG 4视频压缩的数据流模式。提出了基于宏块空间复杂度的宏块类型判断算法,有效地降低了视频压缩算法的计算复杂度。测试结果表明,采用MPEG 4视频标准该视频编码器每秒能够压缩39 2帧CIF图像。 Witb the development of video encoding techniques, video compression algorithms become more complicated. A real-time high resolution video encoder cannot be implemented with a single CPU or DSP. A MPEG-4 video encoder is designed and implemented based on coordinated DSP and FPGA techniques. The FP GA module takes the tasks of video acquisition, YUV separation and data I/O functions, while the DSP is dedicated for video compression. The data flow scheme of the MPEG-4 video compression is optimized by milizing the DSP＇s on-chip memory. A Macro Block （MB） type judging algorithm is proposed based on MB＇s space complexity. It reduces effectively the computational complexity of the video compression. The experimental re suits indicate thai the MPEG 4 video encoder implementation can encode 39.2 f/s in CIF resolution.
作者 牛建伟 胡建平 毛士艺
机构地区 北京航空航天大学电子信息工程学院 北京航空航天大学计算机学院
出处 《航空学报》 EI CAS CSCD 北大核心 2005年第1期90-93,共4页 Acta Aeronautica et Astronautica Sinica
基金 国家自然科学基金(69974005)资助项目
关键词 视频 视频编码器 FPGA DSP MPEG4 video vhdeo encoder FPGA DSP MPEG-4
分类号 V243 [航空宇航科学与技术—飞行器设计]
  • 相关文献

参考文献6

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共引文献2

同被引文献45

  • 1朱鹏,杜洪根,丁文锐.视频压缩编码器的研究与设计[J].无线电工程,2006,36(6):36-38. 被引量：3
  • 2焦荣惠,郭立,郭利生,郑军.基于流水线的运动估计算法FPGA设计[J].计算机仿真,2007,24(2):76-78. 被引量：1
  • 3范守文,黄洪钟,杨玻玻.机电产品容错纠错设计系统及其基本框架研究[J].计算机集成制造系统,2007,13(7):1275-1281. 被引量：13
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  • 6Osornio R R, Romero T R. The application of reconfigu rable logic to high speed CNC milling machines controllers [J]. Control Engineering Practice, 2008, 16(6): 674- 684.
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引证文献5

二级引证文献8

航空学报
2005年 第1期

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