期刊文献+

基于DSP和FPGA的高速图像压缩系统设计 被引量:2

The Design of High-speed Image Compressing System Based on DSP and FPGA
在线阅读 下载PDF
导出
摘要 设计了一种以DSP(数字信号处理器)和FPGA(现场可编程门阵列)为核心的图像压缩系统.在处理速度上具有一定优势,能够完成基于DWT(离散小波变换)和EBCOT(优化截取的嵌入式块编码)图像压缩算法的实时图像压缩,且系统具有可重构性,能够容易地用来实现其他的图像处理算法. An Image Compressing System is designed with DSP and FPGA. The speed of this system is high enough to complete image compressing based on DWT and EBCOT in time. The system is reconfigutable, and it is also fit for other processing algorithm.
出处 《电子工程师》 2005年第8期51-52,55,共3页 Electronic Engineer
关键词 图像压缩 小波变换 DSP FPGA image compression, discrete wavelets transform, DSP, FPGA
  • 相关文献

参考文献2

二级参考文献6

  • 1Boliek M, Christopoulos C, Majani E. JPEG2000 Part I,Final Committee Draft Version 1.0 [S]. ISO/IEC JTC 1/SC 29/WG 1 N1646R, 2000.
  • 2Taubman D, Ordentlich E, Weinberger M, et al. Embedded block coding in JPEG2000 [A]. IEEE Inter Conf on Image Processing [C]. 2000. 33-36.
  • 3Lian C, Chen K, Chen H, et al. Analysis and architecture design of lifting based DWT and EBCOT for JPEG2000 [A].Proc Inter Symposium on VLSI Technology, Systems, and Applications[C]. 2001. 180-183.
  • 4Sweldens W.The lifting scheme: A new philosophy in biorthogonal wavelet constructions FA]. Proc SPIE [C].1995. 68-79.
  • 5MENG Hongying, WANG Zhihua. Fast spatial combinative lifting algorithm of wavelet transform using the 9/7 filter for image block compression [J]. Electronics Letters, 2002,36(21): 1766-1767.
  • 6Ortega C C. A line based, reduced memory, wavelet image compression [J]. IEEE Transactions on Image Processing,2000, 9(3): 378-389.

共引文献1

同被引文献11

引证文献2

二级引证文献3

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部