摘要
阐述了一种实现M PSK 数字解调的设计方案,结合FPGA 的特点对锁相环实现载波同步、位同步等各部分进行了详细介绍,整个部分可通过配置参数解调不同的调制信号,具有很强的通用性,对工程设计有一定的参考价值。
This paper introduces a designing method that may realize digital demodulation of MPSK, and provides detailed explanations on the carrier synchronization, bit synchronization and other related parts of DPLL according to the characteristics of FPGA. This method may realize demodulation different modulated signals by means of configuring parameters, which has universal application and some reference value for engineering design.
出处
《军民两用技术与产品》
2005年第4期46-48,共3页
Dual Use Technologies & Products
