摘要
根据I2C接口传输协议,用Altera公司的EDA设计软件Max+plus Ⅱ和VHDL语言设计了 可用于CPLD的IP核,该设计可用于将I2C接口器件与8位MPU的并行总线相连接,以提高8 位嵌入系统的工作性能.通过下载实验验证了该IP核的工作性能.
Based on the I2C bus protocol, is used to the Altera' s EDA software Max + plusⅡ and VHDL. This IP core can be used in the parallel bus of the 8 bit MPU to improve the capability of the embed system, which has been validated by the experiment.
出处
《昆明理工大学学报（理工版）》
2004年第5期76-79,共4页
Journal of Kunming University of Science and Technology(Natural Science Edition)
