摘要
NANDFLASH采用 8根I/O信号线复杂的传送控制、地址和数据信息 ,其控制逻辑需要专门设计。该接口设计基于ARM 7TDMI核 ,AMBAAHB总线结构 ,支持 1bitECC校验和位宽转换。接口设计中的状态机由命令字发送状态组完成对NANDFLASH命令字发送 ,地址发送状态组完成写地址发送 ,读状态组完成读操作 ,写状态组完成写操作。该设计已通过仿真和芯片验证测试 ,功能符合NANDFLASH操作规范。
NAND FLASH uses 8 I/O signallines to complicated transmit control, address and data information. so the interface is special. This design based on the ARM 7TDMI core, AMBA AHB general bus, supports 1 bit ECC verification and 1bit width conversion. The state machine consists of four state groups. Command state group fulfills the function of sending command to NAND FLASH. Address state group fulfills the function of sending address to NAND FLASH. Read state group fulfills reading function. Write state group fulfills writing function. After simulation and real chip function test, all functions accord with the NAND FLASH specification.
出处
《电子器件》
CAS
2004年第2期306-311,共6页
Chinese Journal of Electron Devices
