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超深亚微米P^+栅PMOSFET中NBTI效应及其机理研究 被引量：4

The Study on NBTI Mechanism and Its Effect on P^+ Gate PMOSFET
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摘要 本文深入研究了P+ 栅PMOSFET中的NBTI效应 ,首先通过实验分析了NBTI应力后器件特性及典型参数的退化 ,基于这些实验结果提出了一种可能的NBTI效应发生机制 :即由水分子参与的Si SiO2 界面处的电化学反应 . The influence of negative bias temperature instability(NBTI) on P + polygate PMOSFET's was analyzed.The pre and post-stress degradation of device characteristics and key parameter was obtained from the NBTI stress experiments.Based on this experimental result,the electrochemical reaction which water act as a reactant is the main cause of NBTI mechanism.Lastly,some methods was brought up to suppress NBTI effects.
作者 郝跃 韩晓亮 刘红侠
机构地区 西安电子科技大学微电子研究所
出处 《电子学报》 EI CAS CSCD 北大核心 2003年第z1期2063-2065,共3页 Acta Electronica Sinica
基金 国家 8 63高科技VLSI重大专项基金 国家自然科学基金
关键词 NBTI效应 PMOSFET 界面态 正氧化层固定电荷 NBTI effects PMOSFET interface trap fixed oxide positive charge
分类号 TN306 [电子电信—物理电子学] TN386.1 [电子电信—物理电子学]
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参考文献6

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同被引文献29

  • 1曹艳荣,马晓华,郝跃,于磊,朱志炜,陈海峰.Models and Related Mechanisms of NBTI Degradation of 90nm pMOSFETs[J].Journal of Semiconductors,2007,28(5):665-669. 被引量：1
  • 2黄勇,恩云飞,章晓文.NBTI效应的退化表征[J].半导体技术,2007,32(7):562-564. 被引量：1
  • 3M A Alam, H Kufluoglu, D. Varghese, S. Mahapatra, A com- prehensive model for PMOS NBTI degradation: Recent progress E Jl. Microelectronics Reliability, 2007,47 ( 6 ) : 853 - 862.
  • 4P Shivakumar,M Kisfler,S Keckler,D. Burger,L Alvisi. Modeling the effect of technology trends on the soft error rate of combinational logic [ A ]. Proc DSTN [ C ]. Washington, DC: IEEE Inc, 2002. 389 - 398.
  • 5Liu Biwei, Chen Shuming, Liang Bin, Liu Zheng, Zhao Zhenyu. The effect of re-convergence on SER estimation in combinational circuits [J].IEEE Trans Nucl Sci, 2(109,56 (6) : 3122 - 3129.
  • 6J Zhou, D M Fleetwood, J A Felix, E P Gusev, C. D' Emic. Bias-temperature instabilities and radiation effects in MOS de- vices[J].I IEEE Trans Nucl Sci, 2005,52(6) : 2231.
  • 7Silvestri M, Gerardin S, Paccagnella A, et al. Degradation induced by X-ray irradiation and gate hot cartier stresses in 130- nm NMOSFETs with enclosed layout[J].IEEE Trans Nucl Sci, 2008,55(6) :3216.
  • 8Silvestri M, Gerardin S, Paccagnella A, et al. Gate hot carder stress on irradiated 130 - nm NMOSFETs~ J]. ~F.E Trans Nucl Sci,2008,55(4) : 1960.
  • 9Andrea Cester, Salvatore Cimino, Alessandro Paccagnella, Gerard Ghibaudo, Gabriella Ghidini, Jeffrey Wyss. Acceleraled wear-out of ultra-thin gate oxides after irradiation[J]. IEEE Trans Nucl Sci,2003,50(3) :729.
  • 10Daisuke Kobayashi, Takabiro Makino, and Kazuyuki Hirose, Analytical expression for temporal width characterization of radiation-induced pulse noises in SOI CMOS logic gates[ A]. Proceedings of the 47th Annual International Reliability Physics Symposium [ C ]. Washington, DC: IEEE Inc, 2009. 165- 169.

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电子学报
2003年 第z1期

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