In recent years,propelled by the rapid iterative advancements in digital imaging technology and the semiconductor industry,encompassing microelectronic design,manufacturing,packaging,and testing,time-of-flight(ToF)-ba...In recent years,propelled by the rapid iterative advancements in digital imaging technology and the semiconductor industry,encompassing microelectronic design,manufacturing,packaging,and testing,time-of-flight(ToF)-based imaging systems for acquiring depth information have garnered considerable attention from both academia and industry.This technology has emerged as a focal point of research within the realm of 3D imaging.Owing to its relatively straightforward principles and exceptional performance,ToF technology finds extensive applications across various domains including human−computer interaction,autonomous driving,industrial inspection,medical and healthcare,augmented reality,smart homes,and 3D reconstruction,among others.Notably,the increasing maturity of ToF-based LiDAR systems is evident in current developments.This paper comprehensively reviews the fundamental principles of ToF technology and LiDAR systems,alongside recent research advancements.It elucidates the innovative aspects and technical challenges encountered in both transmitter(TX)and receiver(RX),providing detailed discussions on corresponding solutions.Furthermore,the paper explores prospective avenues for future research,offering valuable insights for subsequent investigations.展开更多
We verify the domain sideway motion around the peripheral regions of the crossed capacitors of top and bottom electrode bars without electrode coverage.To avoid the crosstalk problem between adjacent memory cells,the ...We verify the domain sideway motion around the peripheral regions of the crossed capacitors of top and bottom electrode bars without electrode coverage.To avoid the crosstalk problem between adjacent memory cells,the safe distance between adjacent elements of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin−film capacitors is estimated to be 0.156µm.Moreover,the fatigue of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin-film capacitors is independent of the individual memory size due to the absence of etching damage.展开更多
Ferroelectrics are a type of material with a polar structure and their polarization direction can be inverted reversibly by applying an electric field.They have attracted tremendous attention for their extensive appli...Ferroelectrics are a type of material with a polar structure and their polarization direction can be inverted reversibly by applying an electric field.They have attracted tremendous attention for their extensive applications in non-volatile memory,sensors and neuromorphic computing.However,conventional ferroelectric materials face insulating and interfacial issues in the commercialization process.In contrast,two-dimensional(2D)ferroelectric materials usually have excellent semiconductor performance,clean van der Waals interfaces and robust ferroelectric order in atom-thick layers,and hold greater promise for constructing multifunctional ferroelectric optoelectronic devices and nondestructive ultra-high-density memory.Recently,2D ferroelectrics have obtained impressive breakthroughs,showing overwhelming superiority.Herein,firstly,the progress of experimental research on 2D ferroelectric materials is reviewed.Then,the preparation of 2D ferroelectric devices and their applications are discussed.Finally,the future development trend of 2D ferroelectrics is looked at.展开更多
Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations,and can be repetitively created,erased,and moved during programming into differ...Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations,and can be repetitively created,erased,and moved during programming into different logic states for the nonvolatile memory under an applied electric field,providing a new paradigm for highly miniaturized low-energy electronic devices.Under some specific conditions,the charged domain walls are conducting,differing from their insulating bulk domains.In the past decade,the emergence of atomic-layer scaling solid-state electronic devices is such demonstration,resulting in the rapid rise of domain wall nano-electronics.This review aims to the latest development of ferroelectric domain-wall memories with the presence of the challenges and opportunities and the roadmap to their future commercialization.展开更多
On the basis of novel properties of ferroelectric conducting domain walls,the domain wall nanoelectronics emerges and provides a brand-new dimension for the development of high-density,high-speed and energy-efficient ...On the basis of novel properties of ferroelectric conducting domain walls,the domain wall nanoelectronics emerges and provides a brand-new dimension for the development of high-density,high-speed and energy-efficient nanodevices.For in-memory computing,three-terminal devices with both logic and memory functions such as transistors purely based on ferroelectric domain walls are urgently required.Here,a prototype ferroelectric domain-wall transistor with a well-designed coplanar electrode geometry is demonstrated on epitaxial Bi Fe O_(3)thin films.For the logic function,the current switching between on/off states of the transistor depends on the creation or elimination of conducting domain walls between drain and source electrodes.For the data storage,the transistor can maintain nonvolatile on/off states after the write/erase operations,providing an innovative approach for the development of the domain wall nanoelectronics.展开更多
The unipolar diode-like domain wall currents in LiNbO3 single-crystal nanodevices are not only attractive in terms of their applications in nonvolatile ferroelectric domain wall memory,but also useful in half-wave and...The unipolar diode-like domain wall currents in LiNbO3 single-crystal nanodevices are not only attractive in terms of their applications in nonvolatile ferroelectric domain wall memory,but also useful in half-wave and full-wave rectifier systems,as well as detector,power protection,and steady voltage circuits.Unlike traditional diodes,where the rectification functionality arises from the contact between n-type and p-type conductors,which are unchanged after off-line production,ferroelectric domain wall diodes can be reversibly created,erased,positioned,and shaped,using electric fields.We demonstrate such functionality using ferroelectric mesa-like cells,formed at the surface of an insulating X-cut LiNbO_(3) single crystal.Under the application of an in-plane electric field above a coercive field along the polar Z axis,the domain within the cell is reversed to be antiparallel to the unswitched bottom domain via the formation of a conducting domain wall.The wall current was rectified using two interfacial volatile domains in contact with two side Pt electrodes.Unlike the nonvolatile inner domain wall,the interfacial domain walls disappear to turn off the wall current path after the removal of the applied electric field,or under a negative applied voltage,due to the built-in interfacial imprint fields.These novel devices have the potential to facilitate the random definition of diode-like elements in modern large-scale integrated circuits.展开更多
Substrates provide the necessary support for scientific explorations of numerous promising features and exciting potential applications in two-dimensional (2D) transition metal dichalcogenides (TMDs). To utilize subst...Substrates provide the necessary support for scientific explorations of numerous promising features and exciting potential applications in two-dimensional (2D) transition metal dichalcogenides (TMDs). To utilize substrate engineering to alter the properties of 2D TMDs and avoid introducing unwanted adverse effects, various experimental techniques, such as high-frequency Raman spectroscopy, have been used to understand the interactions between 2D TMDs and substrates. However, sample-substrate interaction in 2D TMDs is not yet fully understood due to the lack of systematic studies by techniques that are sensitive to 2D TMD-substrate interaction. This work systematically investigates the interaction between tungsten disulfide (WS_(2)) monolayers and substrates by low-frequency Raman spectroscopy, which is very sensitive to WS_(2)-substrate interaction. Strong coupling with substrates is clearly revealed in chemical vapor deposition (CVD)-grown monolayer WS_(2) by its low-wavenumber interface mode. It is demonstrated that the enhanced sample-substrate interaction leads to tensile strain on monolayer WS_(2), which is induced during the cooling process of CVD growth and could be released for monolayer WS_(2) sample after transfer or fabricated by an annealing-free method such as mechanical exfoliation. These results not only suggest the effectiveness of low-frequency Raman spectroscopy for probing sample-substrate interactions in 2D TMDs, but also provide guidance for the design of high-performance devices with the desired sample-substrate coupling strength based on 2D TMDs.展开更多
A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanc...A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation（NED） and normalized standard deviation（NSD） are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.展开更多
This paper presents a first monolithic RF transceiver for DC-OFDM UWB applications.The proposed direct-conversion transceiver integrates all the building blocks including two receiver（Rx） cores,two transmitter （Tx...This paper presents a first monolithic RF transceiver for DC-OFDM UWB applications.The proposed direct-conversion transceiver integrates all the building blocks including two receiver（Rx） cores,two transmitter （Tx） cores and a dual-carrier frequency synthesizer（DC-FS） as well as a 3-wire serial peripheral interface（SPI） to set the operating status of the transceiver.The ESD-protected chip is fabricated by a TSMC 0.13-μm RF CMOS process with a die size of 4.5 x 3.6 mm2.The measurement results show that the wideband Rx achieves an NF of 5-6.2 dB,a max gain of 76-84 dB with 64-dB variable gain,an in-/out-of-band IIP3 of-6/＋4 dBm and an input loss S11 of〈-10 in all bands.The Tx achieves an LOLRR/IMGRR of-34/-33 dBc,a typical OIP3 of＋6 dBm and a maximum output power of -5 dBm.The DC-FS outputs two separate carriers simultaneously with an inter-band hopping time of〈1.2 ns.The full chip consumes a maximum current of 420 mA under a 1.2-V supply.展开更多
Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters （TIADCs）.A calibration method implemented in mixed circuits with low complexity and fast convergence is pro...Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters （TIADCs）.A calibration method implemented in mixed circuits with low complexity and fast convergence is proposed in this paper.The algorithm for detecting sample-time error is based on correlation and widely applied to wide-sense stationary input signals.The detected sample-time error is corrected by a voltage-controlled sampling switch.The experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise and distortion ratio improves by 19.1 dB,and the spurious-free dynamic range improves by 34.6 dB for a 70.12-MHz input after calibration.The calibration convergence time is about 20000 sampling intervals.展开更多
A design of high dynamic range linear radio frequency power detector(PD),aimed for transmitter carrier leakage suppression is presented in this paper.Based on the logarithmic amplifier principle,this detector utilizes...A design of high dynamic range linear radio frequency power detector(PD),aimed for transmitter carrier leakage suppression is presented in this paper.Based on the logarithmic amplifier principle,this detector utilizes the successive detection method to achieve a high dynamic range in the radio frequency band.In order to increase sensitivity,a low noise amplifier(LNA)is placed in the front of this detector.DC coupling is adopted in this architecture to reduce parasitics and save area,but this will unavoidably cause DC offsets in the circuit which are detrimental to the dynamic range.So a DC offset cancelling(DCOC)technique is proposed to solve the problem.Finally,this detector was fabricated in the SMIC 0.13μm CMOS process.The measured results show that it achieves a wide dynamic range of 50 dB/40 dB with log errors in 4-1 dB at 900 MHz/2 GHz,while draws 16 mA from a 1.5 V power supply.The active chip area is 0.27×0.67 mm^(2).展开更多
A 1500 mA,10 MHz self-adaptive on-time （SOT） controlled buck DC-DC converter is presented. Both a low-cost ripple compensation scheme （RCS） and a self-adaptive on-time generator （SAOTG） are proposed to solve the...A 1500 mA,10 MHz self-adaptive on-time （SOT） controlled buck DC-DC converter is presented. Both a low-cost ripple compensation scheme （RCS） and a self-adaptive on-time generator （SAOTG） are proposed to solve the system stability and frequency variation problem. Meanwhile a self-adaptive power transistor sizing （SAPTS） technique is used to optimize the efficiency especially with a heavy load. The circuit is implemented in a 2P4M 0.35μm CMOS process. A small external inductor of 0.47 μH and a capacitor of 4.7 μF are used to lower the cost of the converter and keep the output ripple to less than 10 mV. The measurement results show that the overshoot of the load transient response is 8 mV @ 200 mA step and the dynamic voltage scaling （DVS） performance is a rise of 16/zs/V and a fall of 20 μs/V. With a SAPTS technique and PFM control, the efficiency is maintained at more than 81% for a load range of 20 to 1500 mA and the peak efficiency reaches 88.43%.展开更多
A fourth-order switched-capacitor bandpass ∑△ modulator is presented for digital intermediatefrequency （IF） receivers. The circuit operates at a sampling frequency of 100 MHz. The transfer function of the resonato...A fourth-order switched-capacitor bandpass ∑△ modulator is presented for digital intermediatefrequency （IF） receivers. The circuit operates at a sampling frequency of 100 MHz. The transfer function of the resonator considering nonidealities of the operational amplifier is proposed so as to optimize the performance of resonators. The modulator is implemented in a 0.13-μm standard CMOS process. The measurement shows that the signal-to-noise-and-distortion ratio and dynamic range achieve 68 dB and 75 dB, respectively, over a bandwidth of 200 kHz centered at 25 MHz, and the power dissipation is 8.2 mW at a 1.2 V supply.展开更多
A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input sta...A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input stage is also presented to equivalently amplify the input time difference with a gain of 2.The GRO based TDC circuit is fabricated in TSMC 65 nm CMOS technology and the core area is about 0.02 mm^2.According to the measurement results,the effective resolution of this circuit is better than 4.22 ps under a 50 MHz clock frequency. With a 1 ns input range,the maximum clock frequency of this circuit is larger than 200 MHz.Under a 1 V power supply,with a 200-800 ps input time difference,the measured power consumption is 1.24 to 1.72 mW at 50 MHz clock frequency and 1.73 to 2.20 mW at 200 MHz clock frequency.展开更多
A single loop fourth-order delta-sigma modulator is presented for audio applications. A reconfigurable mechanism is adopted for two bandwidth-based modes （8 kHz/16 kHz）. Manufactured in the SM1C 0.13μm CMOS mixed s...A single loop fourth-order delta-sigma modulator is presented for audio applications. A reconfigurable mechanism is adopted for two bandwidth-based modes （8 kHz/16 kHz）. Manufactured in the SM1C 0.13μm CMOS mixed signal process, the chip consumes low power （153.6 μW） and occupies a core area of 0.98×0.46 mm2. The presented modulator achieves an 89.3 dB SNR and 90.2 dB dynamic range in 16 kHz mode, as well as a 90.2 dB SNR and 86 dB dynamic range in 8 kHz mode. The designed modulator shows a very competitive figure of merit among state-of-the-art low voltage modulators.展开更多
A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers. The enhancer utilizes the class-AB input stage to improve current efficiency, while it works on an open loop with reg...A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers. The enhancer utilizes the class-AB input stage to improve current efficiency, while it works on an open loop with regard to the enhanced amplifier so that it has no effect on the stability of the amplifier. During the slewing period, the enhancer detects input differential voltage of the amplifier, and produces external enhancement currents for the amplifier, driving load capacitors to charge/discharge faster. Simulation results show that, fora large input step, the enhancerreduces settling time by nearly 50%. When the circuit is employed in a sample-and-hold circuit, it greatly improves the spur-free dynamic range by 44.6 dB and the total harmonic distortion by 43.9 dB. The proposed circuit is very suitable to operate under a low voltage （1.2 V or below） with a standby current of 200 μA.展开更多
文摘In recent years,propelled by the rapid iterative advancements in digital imaging technology and the semiconductor industry,encompassing microelectronic design,manufacturing,packaging,and testing,time-of-flight(ToF)-based imaging systems for acquiring depth information have garnered considerable attention from both academia and industry.This technology has emerged as a focal point of research within the realm of 3D imaging.Owing to its relatively straightforward principles and exceptional performance,ToF technology finds extensive applications across various domains including human−computer interaction,autonomous driving,industrial inspection,medical and healthcare,augmented reality,smart homes,and 3D reconstruction,among others.Notably,the increasing maturity of ToF-based LiDAR systems is evident in current developments.This paper comprehensively reviews the fundamental principles of ToF technology and LiDAR systems,alongside recent research advancements.It elucidates the innovative aspects and technical challenges encountered in both transmitter(TX)and receiver(RX),providing detailed discussions on corresponding solutions.Furthermore,the paper explores prospective avenues for future research,offering valuable insights for subsequent investigations.
基金by Shanghai Key Program(No 1052nm07600)the Program for Professors of Special Appointment(Eastern Scholar)at Shanghai.
文摘We verify the domain sideway motion around the peripheral regions of the crossed capacitors of top and bottom electrode bars without electrode coverage.To avoid the crosstalk problem between adjacent memory cells,the safe distance between adjacent elements of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin−film capacitors is estimated to be 0.156µm.Moreover,the fatigue of Pt/SrBi_(2)Ta_(2)O_(9)/Pt thin-film capacitors is independent of the individual memory size due to the absence of etching damage.
基金Project supported by the National Key Research and Development Program of China (Grant No.2022YFB3505301)the National Natural Science Foundation of China (Grant Nos.12241403 and12174237)the Graduate Education Innovation Project in Shanxi Province (Grant No.2021Y484)。
文摘Ferroelectrics are a type of material with a polar structure and their polarization direction can be inverted reversibly by applying an electric field.They have attracted tremendous attention for their extensive applications in non-volatile memory,sensors and neuromorphic computing.However,conventional ferroelectric materials face insulating and interfacial issues in the commercialization process.In contrast,two-dimensional(2D)ferroelectric materials usually have excellent semiconductor performance,clean van der Waals interfaces and robust ferroelectric order in atom-thick layers,and hold greater promise for constructing multifunctional ferroelectric optoelectronic devices and nondestructive ultra-high-density memory.Recently,2D ferroelectrics have obtained impressive breakthroughs,showing overwhelming superiority.Herein,firstly,the progress of experimental research on 2D ferroelectric materials is reviewed.Then,the preparation of 2D ferroelectric devices and their applications are discussed.Finally,the future development trend of 2D ferroelectrics is looked at.
基金Project supported by the National Key Basic Research Program of China (Grant Nos.2019YFA0308500 and 2022YFA1402900)the National Natural Science Foundation of China (Grant No.61904034)。
文摘Ferroelectric domain walls appear as sub-nanometer-thick topological interfaces separating two adjacent domains in different orientations,and can be repetitively created,erased,and moved during programming into different logic states for the nonvolatile memory under an applied electric field,providing a new paradigm for highly miniaturized low-energy electronic devices.Under some specific conditions,the charged domain walls are conducting,differing from their insulating bulk domains.In the past decade,the emergence of atomic-layer scaling solid-state electronic devices is such demonstration,resulting in the rapid rise of domain wall nano-electronics.This review aims to the latest development of ferroelectric domain-wall memories with the presence of the challenges and opportunities and the roadmap to their future commercialization.
基金the National Key Basic Research Program of China(Grant No.2019YFA0308500)the National Natural Science Foundation of China(Grant No.61904034)。
文摘On the basis of novel properties of ferroelectric conducting domain walls,the domain wall nanoelectronics emerges and provides a brand-new dimension for the development of high-density,high-speed and energy-efficient nanodevices.For in-memory computing,three-terminal devices with both logic and memory functions such as transistors purely based on ferroelectric domain walls are urgently required.Here,a prototype ferroelectric domain-wall transistor with a well-designed coplanar electrode geometry is demonstrated on epitaxial Bi Fe O_(3)thin films.For the logic function,the current switching between on/off states of the transistor depends on the creation or elimination of conducting domain walls between drain and source electrodes.For the data storage,the transistor can maintain nonvolatile on/off states after the write/erase operations,providing an innovative approach for the development of the domain wall nanoelectronics.
基金Supported by the National Key Basic Research Program of China(Grant No.2019YFA0308500)the Basic Research Project of Shanghai Science and Technology Innovation Action(Grant No.17JC1400300)the National Natural Science Foundation of China(Grant Nos.61674044 and 61904034)。
文摘The unipolar diode-like domain wall currents in LiNbO3 single-crystal nanodevices are not only attractive in terms of their applications in nonvolatile ferroelectric domain wall memory,but also useful in half-wave and full-wave rectifier systems,as well as detector,power protection,and steady voltage circuits.Unlike traditional diodes,where the rectification functionality arises from the contact between n-type and p-type conductors,which are unchanged after off-line production,ferroelectric domain wall diodes can be reversibly created,erased,positioned,and shaped,using electric fields.We demonstrate such functionality using ferroelectric mesa-like cells,formed at the surface of an insulating X-cut LiNbO_(3) single crystal.Under the application of an in-plane electric field above a coercive field along the polar Z axis,the domain within the cell is reversed to be antiparallel to the unswitched bottom domain via the formation of a conducting domain wall.The wall current was rectified using two interfacial volatile domains in contact with two side Pt electrodes.Unlike the nonvolatile inner domain wall,the interfacial domain walls disappear to turn off the wall current path after the removal of the applied electric field,or under a negative applied voltage,due to the built-in interfacial imprint fields.These novel devices have the potential to facilitate the random definition of diode-like elements in modern large-scale integrated circuits.
基金This work is supported by the National Natural Science Foundation of China(Nos.62004197 and 61774040)the Ministry of Education of Singapore(No.MOE2019-T2-1-004)+5 种基金the Singapore National Research Foundation under the Competitive Research Programs(No.NRF-CRP-21-2018-0007)the National Key R&D Program of China(No.2018YFA0703700)the National Young 1000 Talent Plan of China,the Shanghai Municipal Natural Science Foundation(No.20ZR1403200)the Shanghai Municipal Science and Technology Commission(No.18JC1410300)the Fudan University-CIOMP Joint Fund(No.FC2018-002)the Natural Science Foundation of Liaoning Province,China(Nos.2019-BS-243 and 2019-MS-320).
文摘Substrates provide the necessary support for scientific explorations of numerous promising features and exciting potential applications in two-dimensional (2D) transition metal dichalcogenides (TMDs). To utilize substrate engineering to alter the properties of 2D TMDs and avoid introducing unwanted adverse effects, various experimental techniques, such as high-frequency Raman spectroscopy, have been used to understand the interactions between 2D TMDs and substrates. However, sample-substrate interaction in 2D TMDs is not yet fully understood due to the lack of systematic studies by techniques that are sensitive to 2D TMD-substrate interaction. This work systematically investigates the interaction between tungsten disulfide (WS_(2)) monolayers and substrates by low-frequency Raman spectroscopy, which is very sensitive to WS_(2)-substrate interaction. Strong coupling with substrates is clearly revealed in chemical vapor deposition (CVD)-grown monolayer WS_(2) by its low-wavenumber interface mode. It is demonstrated that the enhanced sample-substrate interaction leads to tensile strain on monolayer WS_(2), which is induced during the cooling process of CVD growth and could be released for monolayer WS_(2) sample after transfer or fabricated by an annealing-free method such as mechanical exfoliation. These results not only suggest the effectiveness of low-frequency Raman spectroscopy for probing sample-substrate interactions in 2D TMDs, but also provide guidance for the design of high-performance devices with the desired sample-substrate coupling strength based on 2D TMDs.
基金Project supported by the Zhejiang Provincial Natural Science Foundation of China(No.LQ14F040001)the National Natural Science Foundation of China(Nos.61274132,61234002)the K.C.Wong Magna Fund in Ningbo University,China
文摘A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation（NED） and normalized standard deviation（NSD） are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.
基金supported by the National Science & Technology Major Projects of China(No.2009ZX03006-007-01)the National High Technology R&D Program of China(No.2009AA01 Z261)
文摘This paper presents a first monolithic RF transceiver for DC-OFDM UWB applications.The proposed direct-conversion transceiver integrates all the building blocks including two receiver（Rx） cores,two transmitter （Tx） cores and a dual-carrier frequency synthesizer（DC-FS） as well as a 3-wire serial peripheral interface（SPI） to set the operating status of the transceiver.The ESD-protected chip is fabricated by a TSMC 0.13-μm RF CMOS process with a die size of 4.5 x 3.6 mm2.The measurement results show that the wideband Rx achieves an NF of 5-6.2 dB,a max gain of 76-84 dB with 64-dB variable gain,an in-/out-of-band IIP3 of-6/＋4 dBm and an input loss S11 of〈-10 in all bands.The Tx achieves an LOLRR/IMGRR of-34/-33 dBc,a typical OIP3 of＋6 dBm and a maximum output power of -5 dBm.The DC-FS outputs two separate carriers simultaneously with an inter-band hopping time of〈1.2 ns.The full chip consumes a maximum current of 420 mA under a 1.2-V supply.
基金supported by the National Natural Science Foundation of China(No.61006025)the Special Research Funds for Doctoral Program of Higher Education of China(No.20100071110026)
文摘Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters （TIADCs）.A calibration method implemented in mixed circuits with low complexity and fast convergence is proposed in this paper.The algorithm for detecting sample-time error is based on correlation and widely applied to wide-sense stationary input signals.The detected sample-time error is corrected by a voltage-controlled sampling switch.The experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise and distortion ratio improves by 19.1 dB,and the spurious-free dynamic range improves by 34.6 dB for a 70.12-MHz input after calibration.The calibration convergence time is about 20000 sampling intervals.
基金Project supported by the Important National Science&Technology Specific Projects,China(No.2010ZX03001-004)the National High Technology Research and Development Program of China(No.2009AA011605)
文摘A design of high dynamic range linear radio frequency power detector(PD),aimed for transmitter carrier leakage suppression is presented in this paper.Based on the logarithmic amplifier principle,this detector utilizes the successive detection method to achieve a high dynamic range in the radio frequency band.In order to increase sensitivity,a low noise amplifier(LNA)is placed in the front of this detector.DC coupling is adopted in this architecture to reduce parasitics and save area,but this will unavoidably cause DC offsets in the circuit which are detrimental to the dynamic range.So a DC offset cancelling(DCOC)technique is proposed to solve the problem.Finally,this detector was fabricated in the SMIC 0.13μm CMOS process.The measured results show that it achieves a wide dynamic range of 50 dB/40 dB with log errors in 4-1 dB at 900 MHz/2 GHz,while draws 16 mA from a 1.5 V power supply.The active chip area is 0.27×0.67 mm^(2).
文摘A 1500 mA,10 MHz self-adaptive on-time （SOT） controlled buck DC-DC converter is presented. Both a low-cost ripple compensation scheme （RCS） and a self-adaptive on-time generator （SAOTG） are proposed to solve the system stability and frequency variation problem. Meanwhile a self-adaptive power transistor sizing （SAPTS） technique is used to optimize the efficiency especially with a heavy load. The circuit is implemented in a 2P4M 0.35μm CMOS process. A small external inductor of 0.47 μH and a capacitor of 4.7 μF are used to lower the cost of the converter and keep the output ripple to less than 10 mV. The measurement results show that the overshoot of the load transient response is 8 mV @ 200 mA step and the dynamic voltage scaling （DVS） performance is a rise of 16/zs/V and a fall of 20 μs/V. With a SAPTS technique and PFM control, the efficiency is maintained at more than 81% for a load range of 20 to 1500 mA and the peak efficiency reaches 88.43%.
基金Project supported by the National High Technology Research and Development Program of China(No.2009AA011600)the Young Scientists Fund of Fudan University,China(No.09FQ33)the State Key Laboratory ASIC & System of Fudan University,China(No. 09MS008)
文摘A fourth-order switched-capacitor bandpass ∑△ modulator is presented for digital intermediatefrequency （IF） receivers. The circuit operates at a sampling frequency of 100 MHz. The transfer function of the resonator considering nonidealities of the operational amplifier is proposed so as to optimize the performance of resonators. The modulator is implemented in a 0.13-μm standard CMOS process. The measurement shows that the signal-to-noise-and-distortion ratio and dynamic range achieve 68 dB and 75 dB, respectively, over a bandwidth of 200 kHz centered at 25 MHz, and the power dissipation is 8.2 mW at a 1.2 V supply.
基金supported by the Important National Science and Technology Specific Projects of China(No.2009ZX01031-003-002)
文摘A gated ring oscillator(GRO) based time-to-digital converter(TDC) is presented.To enhance the resolution of the TDC,a multi-path structure for the GRO is used to achieve a higher oscillation frequency and an input stage is also presented to equivalently amplify the input time difference with a gain of 2.The GRO based TDC circuit is fabricated in TSMC 65 nm CMOS technology and the core area is about 0.02 mm^2.According to the measurement results,the effective resolution of this circuit is better than 4.22 ps under a 50 MHz clock frequency. With a 1 ns input range,the maximum clock frequency of this circuit is larger than 200 MHz.Under a 1 V power supply,with a 200-800 ps input time difference,the measured power consumption is 1.24 to 1.72 mW at 50 MHz clock frequency and 1.73 to 2.20 mW at 200 MHz clock frequency.
基金supported by the National High Technology Research and Development Program of China(No.2008AA0 10702)the National Science & Technology Major Projects,China(No.2009ZX03007-002-02)
文摘A single loop fourth-order delta-sigma modulator is presented for audio applications. A reconfigurable mechanism is adopted for two bandwidth-based modes （8 kHz/16 kHz）. Manufactured in the SM1C 0.13μm CMOS mixed signal process, the chip consumes low power （153.6 μW） and occupies a core area of 0.98×0.46 mm2. The presented modulator achieves an 89.3 dB SNR and 90.2 dB dynamic range in 16 kHz mode, as well as a 90.2 dB SNR and 86 dB dynamic range in 8 kHz mode. The designed modulator shows a very competitive figure of merit among state-of-the-art low voltage modulators.
基金supported by the National Science&Technology Major Project(No.2009ZX03007-002-02)the Program of Shanghai Subject Chief Scientist(No.08XD14007)+1 种基金the Shanghai Municipal IC Design Special Program(No.097062)the Special Research Projects for PhD Education(No.20100071110026)
文摘A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers. The enhancer utilizes the class-AB input stage to improve current efficiency, while it works on an open loop with regard to the enhanced amplifier so that it has no effect on the stability of the amplifier. During the slewing period, the enhancer detects input differential voltage of the amplifier, and produces external enhancement currents for the amplifier, driving load capacitors to charge/discharge faster. Simulation results show that, fora large input step, the enhancerreduces settling time by nearly 50%. When the circuit is employed in a sample-and-hold circuit, it greatly improves the spur-free dynamic range by 44.6 dB and the total harmonic distortion by 43.9 dB. The proposed circuit is very suitable to operate under a low voltage （1.2 V or below） with a standby current of 200 μA.
