This paper presents a fully integrated carrier clock recovery circuit for a mobile payment application. The architecture is based on a sampling-detection module and a charge pump phase locked loop. Compared with clock...This paper presents a fully integrated carrier clock recovery circuit for a mobile payment application. The architecture is based on a sampling-detection module and a charge pump phase locked loop. Compared with clock recovery in conventional 13.56 MHz transponders, this circuit can recover a high-precision consecutive carrier clock from the on/off keying （OOK） signal sent by interrogators. Fabricated by a SMIC 0.18-μm EEPROM CMOS process, this chip works from a single power supply as low as 1.5 V. Measurement results show that this circuit provides 0.34% frequency deviation and 8 mV sensitivity.展开更多
This paper describes a multimode high-resolution digital pulse width modulator.This modulator,based on a novel hybrid structure,not only has a programmable duty cycle but also realizes phase modulation.A 576 ps pulse ...This paper describes a multimode high-resolution digital pulse width modulator.This modulator,based on a novel hybrid structure,not only has a programmable duty cycle but also realizes phase modulation.A 576 ps pulse resolution is achieved based on a 13.56 MHz switching frequency for near field communication.Fabricated in a SMIC 0.18-μm EEPROM CMOS process,the total area of modulator is only 130×180μm2.Measurement results validate the multi-mode modulation function and high pulse resolution.展开更多
基金Proiect supported by the Important National Science&Technology Specific Projects(No.2009ZX03001-012-03).
文摘This paper presents a fully integrated carrier clock recovery circuit for a mobile payment application. The architecture is based on a sampling-detection module and a charge pump phase locked loop. Compared with clock recovery in conventional 13.56 MHz transponders, this circuit can recover a high-precision consecutive carrier clock from the on/off keying （OOK） signal sent by interrogators. Fabricated by a SMIC 0.18-μm EEPROM CMOS process, this chip works from a single power supply as low as 1.5 V. Measurement results show that this circuit provides 0.34% frequency deviation and 8 mV sensitivity.
基金Project supported by the Important National Science & Technology Specific Projects(No2009ZX03001-012-03)
文摘This paper describes a multimode high-resolution digital pulse width modulator.This modulator,based on a novel hybrid structure,not only has a programmable duty cycle but also realizes phase modulation.A 576 ps pulse resolution is achieved based on a 13.56 MHz switching frequency for near field communication.Fabricated in a SMIC 0.18-μm EEPROM CMOS process,the total area of modulator is only 130×180μm2.Measurement results validate the multi-mode modulation function and high pulse resolution.
