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Numerical and experimental study of the mesa configuration in high-voltage 4H–SiC PiN rectifiers 被引量:1
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作者 邓小川 陈茜茜 +2 位作者 李诚瞻 申华军 张金平 《Chinese Physics B》 SCIE EI CAS CSCD 2016年第8期317-321,共5页
The effect of the mesa configuration on the reverse breakdown characteristic of a SiC PiN rectifier for high-voltage applications is analyzed in this study.Three geometrical parameters,i.e.,mesa height,mesa angle and ... The effect of the mesa configuration on the reverse breakdown characteristic of a SiC PiN rectifier for high-voltage applications is analyzed in this study.Three geometrical parameters,i.e.,mesa height,mesa angle and mesa bottom corner,are investigated by numerical simulation.The simulation results show that a deep mesa height,a small mesa angle and a smooth mesa bottom(without sub-trench) could contribute to a high breakdown voltage due to a smooth and uniform surface electric field distribution.Moreover,an optimized mesa structure without sub-trench(mesa height of 2.2 μm and mesa angle of 20°) is experimentally demonstrated.A maximum reverse blocking voltage of 4 kV and a forward voltage drop of 3.7 V at 100 A/cm^2 are obtained from the fabricated diode with a 30-μm thick N^- epi-layer,corresponding to 85% of the ideal parallel-plane value.The blocking characteristic as a function of the JTE dose is also discussed for the PiN rectifiers with and without interface charge. 展开更多
关键词 silicon carbide mesa configuration PiN rectifier breakdown voltage
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Effect of post oxidation annealing in nitric oxide on interface properties of 4H-SiC/SiO_2 after high temperature oxidation 被引量:1
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作者 李妍月 邓小川 +4 位作者 刘云峰 赵艳黎 李诚瞻 陈茜茜 张波 《Journal of Semiconductors》 EI CAS CSCD 2015年第9期58-61,共4页
The interface properties of 4H-SiC metal oxide semiconductor (MOS) capacitors with post-oxidation annealing (POA) in nitric oxide (NO) ambient after high temperature (1300 ℃) oxidation have been investigated ... The interface properties of 4H-SiC metal oxide semiconductor (MOS) capacitors with post-oxidation annealing (POA) in nitric oxide (NO) ambient after high temperature (1300 ℃) oxidation have been investigated using capacitance-voltage (C V) measurements. The experimental results show that the interface states density (Dit) can be obviously decreased by the POA in NO ambient (NO-POA) and further reduced with increasing POA temperature and time. In the meantime significant reduction of the interface states density and oxidation time can be achieved at the higher thermal oxidation temperature, which results in the better oxide MOS characteristics and lower production costs. The dependence of Dit on POA temperature and time has been also discussed in detail. 展开更多
关键词 C-V characteristics 4H-SiC MOS post-oxidation annealing SiC/SiO2
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