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Reliability of High Speed Ultra Low Voltage Differential CMOS Logic
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作者 Omid Mirmotahari Yngvar Berg 《Circuits and Systems》 2015年第5期121-135,共15页
In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present... In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations. 展开更多
关键词 CMOS DIFFERENTIAL FLOATING-GATE Semi-Floating-Gate KEEPER RECHARGE ULTRA Low Voltage High Speed Monte-Carlo CADENCE STM 90 nm
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