This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Adv...This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Advanced Encryption Standard （AES）, 3 Data Encryption Standard （3 DES） and Secure Hash Algorithm 1 （SHA - 1 ） security engines, but also involves a new memory encryption scheme. The new memory encryption scheme is implemented by a memory encryption cache （MEC）, which protects the confidentiality of the memory by AES encryption. The experi- ments show that the new secure design only causes 1.9% additional delay on the critical path and cuts 25.7% power consumption when the processor writes data back. The new processor balances the performance overhead, the power consumption and the security and fully meets the wireless sensor environment requirement. After physical design, the new encryption embedded processor has been successfully tape-out.展开更多
Application of embedded systems is faced with multiple threats against security.To solve this problem,this article proposes a new program memory encryption mechanism(PEM)to enhance the security of embedded processor.T...Application of embedded systems is faced with multiple threats against security.To solve this problem,this article proposes a new program memory encryption mechanism(PEM)to enhance the security of embedded processor.The new mechanism encrypts all the programs via a secure cache structure.It not only caches the instructions read from the off-chip memory,but also stores the pad values used to encrypt the plaintext.It effectively accelerates encryption and reduces the performance overhead.Besides the encryption,PEM also monitors the program modifications and reset behaviors to reduce the risk of vicious tamper.The experiment indicates that PEM has an average of 2.3%performance improvement and results in a 25.71%power reduction in the write-back stage.The new scheme offers a good balance between performance and security.It is fully practicable for embedded processor.展开更多
文摘This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Advanced Encryption Standard （AES）, 3 Data Encryption Standard （3 DES） and Secure Hash Algorithm 1 （SHA - 1 ） security engines, but also involves a new memory encryption scheme. The new memory encryption scheme is implemented by a memory encryption cache （MEC）, which protects the confidentiality of the memory by AES encryption. The experi- ments show that the new secure design only causes 1.9% additional delay on the critical path and cuts 25.7% power consumption when the processor writes data back. The new processor balances the performance overhead, the power consumption and the security and fully meets the wireless sensor environment requirement. After physical design, the new encryption embedded processor has been successfully tape-out.
基金supported by the National Natural Science Foundation of China(60973034)the Program for New Century Excellent Talents in University(NCET-07-0328)
文摘Application of embedded systems is faced with multiple threats against security.To solve this problem,this article proposes a new program memory encryption mechanism(PEM)to enhance the security of embedded processor.The new mechanism encrypts all the programs via a secure cache structure.It not only caches the instructions read from the off-chip memory,but also stores the pad values used to encrypt the plaintext.It effectively accelerates encryption and reduces the performance overhead.Besides the encryption,PEM also monitors the program modifications and reset behaviors to reduce the risk of vicious tamper.The experiment indicates that PEM has an average of 2.3%performance improvement and results in a 25.71%power reduction in the write-back stage.The new scheme offers a good balance between performance and security.It is fully practicable for embedded processor.
