The(010)orientation ofβ-Ga_(2)O_(3)is a highly promising platform for next-generation lateral power electronics due to its superior theoretical transport properties.However,progress has been impeded by the unavailabi...The(010)orientation ofβ-Ga_(2)O_(3)is a highly promising platform for next-generation lateral power electronics due to its superior theoretical transport properties.However,progress has been impeded by the unavailability of large-area substrates,limiting studies to small-scale samples.Leveraging the recent emergence of 2-inch wafers,we report the first demonstration of homoepitaxial growth on a 2-inch,Fe-doped semi-insulating(010)β-Ga_(2)O_(3)substrate by metal-organic chemical vapor deposition(MOCVD).A systematic,wafer-scale characterization reveals the successful growth of a highquality epitaxial film.High-resolution x-ray diffraction shows an excellent crystalline structure,with a rocking curve full-width ranging from 21.0 arcsec to 103.0 arcsec.Atomic force microscopy confirms an atomically smooth surface with a root-mean-square roughness below 1.53 nm,displaying a distinct step-flow growth mode across the wafer.Furthermore,mercury-probe capacitance-voltage mapping indicates a well-controlled carrier concentration of~2×10~(18)cm~(-3)with a RSD of 5.12%.This work provides the first comprehensive assessment of 2-inch(010)Ga_(2)O_(3)epitaxial wafers,validating a critical material platform for the development and future manufacturing of high-performance power devices.展开更多
In this paper, a new pre-alignment approach based on Four-Quadrant-Photo-Detector （FQPD） for IC mask is presented. The voltage outputs from FQPDs are the functions of alignment mark＇s position offsets with respect ...In this paper, a new pre-alignment approach based on Four-Quadrant-Photo-Detector （FQPD） for IC mask is presented. The voltage outputs from FQPDs are the functions of alignment mark＇s position offsets with respect to FQPDs. The functions are obtained with least squares error （LSE）-based polynomial fitting after the normalization of experimental data. As the acquired functions are not monotonic about their variables, the alignment mark＇s position offset cannot be given by direct inverse operation on the obtained functions. However, the piecewise polynomial fitting gives the inverse function, with which the alignment mark＇s position offset can be predicted according to the voltage outputs of FQPDs. On the basis of prediction, a pre-alignment control strategy is proposed. The feasibility and robustness of the pre-alignment approach is shown by experiments. Furthermore, the results demonstrate that the maximum error of mask＇s position offset in the X- and Y- directions is less than 15μm after coarse pre-alignment. Keywords： Four-Quadrant-Photo-Detector （FQPD）, pre-alignment, IC mask, polynomial fitting展开更多
Wafer pre-aligning system is an important component in IC manufacturing industry.A wafer pre-aligning platform with a CCD sensor is presented in this paper.The centering and notch detecting approaches are extended bas...Wafer pre-aligning system is an important component in IC manufacturing industry.A wafer pre-aligning platform with a CCD sensor is presented in this paper.The centering and notch detecting approaches are extended based on this platform. Least square circle fitting approach is adopted to calculate the center and radius of the wafer, and a formula for calculating the fitting error is derived. An approach called edge variation rate is also proposed to detect the range of wafer notch, and the fiducial is calculated by curve fitting approach. These approaches can improve the accuracy effectively as indicated by experiments.展开更多
Nanogrinding of SiC wafers with high flatness and low subsurface damage was proposed and nanogrinding experiments were carried out on an ultra precision grinding machine with fine diamond wheels. Experimental results ...Nanogrinding of SiC wafers with high flatness and low subsurface damage was proposed and nanogrinding experiments were carried out on an ultra precision grinding machine with fine diamond wheels. Experimental results show that nanogrinding can produce flatness less than 1.0μm and a surface roughness Ra of 0.42nm. It is found that nanogrinding is capable of producing much flatter SiC wafers with a lower damage than double side lapping and mechanical polishing in much less time and it can replace double side lapping and mechanical polishing and reduce the removal amount of chemical mechanical polishing.展开更多
To reveal the drop failure modes of the wafer level chip scale packages （WLCSPs） with Sn-3.0Ag-0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were iden...To reveal the drop failure modes of the wafer level chip scale packages （WLCSPs） with Sn-3.0Ag-0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were identified, i.e., short FR-4 cracks and complete FR-4 cracks at the printing circuit board （PCB） side, split between redistribution layer （RDL） and Cu under bump metallization （UBM）, RDL fracture, bulk cracks and partial bulk and intermetallic compound （IMC） cracks at the chip side. For the outmost solder joints, complete FR-4 cracks tended to occur, due to large deformation of PCB and low strength of FR-4 dielectric layer. The formation of complete FR-4 cracks largely absorbed the impact energy, resulting in the absence of other failure modes. For the inner solder joints, the absorption of impact energy by the short FR-4 cracks was limited, resulting in other failure modes at the chip side.展开更多
We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of...We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of subsurface damage. The bevel angle can be calculated from the interference fringes formed in the wedge. The minimum depth of the subsurface damage that can be measured by this method is a few hundred nanometers. Our results show that the method is straightforward, accurate, and convenient.展开更多
Peroxodiphosphate anion （a powerful oxidant） can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied dur...Peroxodiphosphate anion （a powerful oxidant） can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied during the oxidation,decomposition, and removal of organic contaminations on a silicon wafer surface, and it was used as the first step in the diamond electrochemical cleaning technique （DECT）. The cleaning effects of DECT were compared with the RCA cleaning technique, including the silicon surface chemical composition that was observed with X-ray photoelectron spectroscopy and the morphology observed with atomic force microscopy. The measurement results show that the silicon surface cleaned by DECT has slightly less organic residue and lower micro-roughness,so the new technique is more effective than the RCA cleaning technique.展开更多
A double layered porous silicon with different porosity is formed on a heavy doped p type Si(111) substrate by changing current density during the anodizing.Then a high quality epitaxial mono crystalline silicon fil...A double layered porous silicon with different porosity is formed on a heavy doped p type Si(111) substrate by changing current density during the anodizing.Then a high quality epitaxial mono crystalline silicon film is grown on the porous silicon using an ultra high vacuum electron beam evaporator.This wafer is bonded with other silicon wafer with a thermal oxide layer at room temperature.The bonded pairs are split along the porous silicon layer during subsequent thermal annealing.Thus the epitaxial Si film is transferred to the oxidized wafer to form a silicon on insulator structure.SEM,XTEM,spreading resistance probe and Hall measurement show that the SOI structure has good structural and electrical quality.展开更多
The effect of rapid thermal annealing （RTA） ambient on denuded zone and oxygen precipitates in Czochralski （CZ） silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demon...The effect of rapid thermal annealing （RTA） ambient on denuded zone and oxygen precipitates in Czochralski （CZ） silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demonstrated that a high density of oxygen precipitates and thin denuded zone are obtained in N2/NH3 ambient,while a relatively lower density of oxygen precipitates and thicker denuded zone are observed in N2 ambient. As the RTA duration times increased, the oxygen precipitate density increased and the denuded zone depth decreased. X-ray photoelectron spectroscopy （XPS） data and atomic force microscope （AFM） results show that there RTA process,which can explain the different effect of RTA was a surface nitriding reaction during the N2/NH3 ambient ambient.展开更多
半导体设备是芯片制造的核心单元,承担光刻、刻蚀、薄膜沉积等关键工艺,其调度效率直接影响晶圆产能与工厂效益,设计出一个高效稳定的调度系统是保证最优产能的前提。然而,一方面,高精度、多环节的晶圆加工步骤使设备调度系统设计难度提...半导体设备是芯片制造的核心单元,承担光刻、刻蚀、薄膜沉积等关键工艺,其调度效率直接影响晶圆产能与工厂效益,设计出一个高效稳定的调度系统是保证最优产能的前提。然而,一方面,高精度、多环节的晶圆加工步骤使设备调度系统设计难度提升;另一方面,设备内对晶圆的调度效率会影响产能,导致对系统计算效率的要求较高。传统的调度设计方法往往基于遗传算法在解空间上搜索最优解,难以满足系统的实时性需求。文中设计通过对双集束型晶圆加工半导体设备中的出片限制、模块使用限制、禁止超片、阀门互斥限制、Just in Time共5个调度限制进行系统性分析,创新性地将加工仓任务池、机械臂任务池的任务调度问题抽象为混合整数规划(MIP)模型,并且基于数学规划求解器Gurobi进行快速求解,相较于传统算法求解速度提升了一个数量级。展开更多
The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wh...The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wheels respectively,are analyzed.In addition,considering the effects of grain size and grinding depth on surface grinding temperature during these two grinding processes,significant results and conclusions are obtained from experimental research.展开更多
基金supported by the National Natural Science Foundation of China(Grant Nos.U23A20358,62474170,61925110,62404214,and 62234007)the University of Science and Technology of China(USTC)Research Funds of the Double First-Class Initiative(Grant No.WK2100000055)+2 种基金the Project of the 46t hResearch Institute of CETC(Grant No.WDZC202446007)the JieBang Headed Project of Changsha City Hunan Province(Grant No.kq2301006)the Opening Project and the Key Laboratory of Nano devices and Applications in Suzhou Institute of Nano-Tech and NanoBionics of CAS。
文摘The(010)orientation ofβ-Ga_(2)O_(3)is a highly promising platform for next-generation lateral power electronics due to its superior theoretical transport properties.However,progress has been impeded by the unavailability of large-area substrates,limiting studies to small-scale samples.Leveraging the recent emergence of 2-inch wafers,we report the first demonstration of homoepitaxial growth on a 2-inch,Fe-doped semi-insulating(010)β-Ga_(2)O_(3)substrate by metal-organic chemical vapor deposition(MOCVD).A systematic,wafer-scale characterization reveals the successful growth of a highquality epitaxial film.High-resolution x-ray diffraction shows an excellent crystalline structure,with a rocking curve full-width ranging from 21.0 arcsec to 103.0 arcsec.Atomic force microscopy confirms an atomically smooth surface with a root-mean-square roughness below 1.53 nm,displaying a distinct step-flow growth mode across the wafer.Furthermore,mercury-probe capacitance-voltage mapping indicates a well-controlled carrier concentration of~2×10~(18)cm~(-3)with a RSD of 5.12%.This work provides the first comprehensive assessment of 2-inch(010)Ga_(2)O_(3)epitaxial wafers,validating a critical material platform for the development and future manufacturing of high-performance power devices.
基金This work was supported by National High Technology Research and Development Program of PRC (No. 2002AA420040)National 973 Program of PRC (No. 2002CB312200).
文摘In this paper, a new pre-alignment approach based on Four-Quadrant-Photo-Detector （FQPD） for IC mask is presented. The voltage outputs from FQPDs are the functions of alignment mark＇s position offsets with respect to FQPDs. The functions are obtained with least squares error （LSE）-based polynomial fitting after the normalization of experimental data. As the acquired functions are not monotonic about their variables, the alignment mark＇s position offset cannot be given by direct inverse operation on the obtained functions. However, the piecewise polynomial fitting gives the inverse function, with which the alignment mark＇s position offset can be predicted according to the voltage outputs of FQPDs. On the basis of prediction, a pre-alignment control strategy is proposed. The feasibility and robustness of the pre-alignment approach is shown by experiments. Furthermore, the results demonstrate that the maximum error of mask＇s position offset in the X- and Y- directions is less than 15μm after coarse pre-alignment. Keywords： Four-Quadrant-Photo-Detector （FQPD）, pre-alignment, IC mask, polynomial fitting
文摘Wafer pre-aligning system is an important component in IC manufacturing industry.A wafer pre-aligning platform with a CCD sensor is presented in this paper.The centering and notch detecting approaches are extended based on this platform. Least square circle fitting approach is adopted to calculate the center and radius of the wafer, and a formula for calculating the fitting error is derived. An approach called edge variation rate is also proposed to detect the range of wafer notch, and the fiducial is calculated by curve fitting approach. These approaches can improve the accuracy effectively as indicated by experiments.
基金Project (50975040) supported by the National Natural Science Foundation of China
文摘Nanogrinding of SiC wafers with high flatness and low subsurface damage was proposed and nanogrinding experiments were carried out on an ultra precision grinding machine with fine diamond wheels. Experimental results show that nanogrinding can produce flatness less than 1.0μm and a surface roughness Ra of 0.42nm. It is found that nanogrinding is capable of producing much flatter SiC wafers with a lower damage than double side lapping and mechanical polishing in much less time and it can replace double side lapping and mechanical polishing and reduce the removal amount of chemical mechanical polishing.
基金Projects(51475072,51171036)supported by the National Natural Science Foundation of China
文摘To reveal the drop failure modes of the wafer level chip scale packages （WLCSPs） with Sn-3.0Ag-0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were identified, i.e., short FR-4 cracks and complete FR-4 cracks at the printing circuit board （PCB） side, split between redistribution layer （RDL） and Cu under bump metallization （UBM）, RDL fracture, bulk cracks and partial bulk and intermetallic compound （IMC） cracks at the chip side. For the outmost solder joints, complete FR-4 cracks tended to occur, due to large deformation of PCB and low strength of FR-4 dielectric layer. The formation of complete FR-4 cracks largely absorbed the impact energy, resulting in the absence of other failure modes. For the inner solder joints, the absorption of impact energy by the short FR-4 cracks was limited, resulting in other failure modes at the chip side.
文摘We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of subsurface damage. The bevel angle can be calculated from the interference fringes formed in the wedge. The minimum depth of the subsurface damage that can be measured by this method is a few hundred nanometers. Our results show that the method is straightforward, accurate, and convenient.
文摘Peroxodiphosphate anion （a powerful oxidant） can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied during the oxidation,decomposition, and removal of organic contaminations on a silicon wafer surface, and it was used as the first step in the diamond electrochemical cleaning technique （DECT）. The cleaning effects of DECT were compared with the RCA cleaning technique, including the silicon surface chemical composition that was observed with X-ray photoelectron spectroscopy and the morphology observed with atomic force microscopy. The measurement results show that the silicon surface cleaned by DECT has slightly less organic residue and lower micro-roughness,so the new technique is more effective than the RCA cleaning technique.
文摘A double layered porous silicon with different porosity is formed on a heavy doped p type Si(111) substrate by changing current density during the anodizing.Then a high quality epitaxial mono crystalline silicon film is grown on the porous silicon using an ultra high vacuum electron beam evaporator.This wafer is bonded with other silicon wafer with a thermal oxide layer at room temperature.The bonded pairs are split along the porous silicon layer during subsequent thermal annealing.Thus the epitaxial Si film is transferred to the oxidized wafer to form a silicon on insulator structure.SEM,XTEM,spreading resistance probe and Hall measurement show that the SOI structure has good structural and electrical quality.
文摘The effect of rapid thermal annealing （RTA） ambient on denuded zone and oxygen precipitates in Czochralski （CZ） silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demonstrated that a high density of oxygen precipitates and thin denuded zone are obtained in N2/NH3 ambient,while a relatively lower density of oxygen precipitates and thicker denuded zone are observed in N2 ambient. As the RTA duration times increased, the oxygen precipitate density increased and the denuded zone depth decreased. X-ray photoelectron spectroscopy （XPS） data and atomic force microscope （AFM） results show that there RTA process,which can explain the different effect of RTA was a surface nitriding reaction during the N2/NH3 ambient ambient.
文摘半导体设备是芯片制造的核心单元,承担光刻、刻蚀、薄膜沉积等关键工艺,其调度效率直接影响晶圆产能与工厂效益,设计出一个高效稳定的调度系统是保证最优产能的前提。然而,一方面,高精度、多环节的晶圆加工步骤使设备调度系统设计难度提升;另一方面,设备内对晶圆的调度效率会影响产能,导致对系统计算效率的要求较高。传统的调度设计方法往往基于遗传算法在解空间上搜索最优解,难以满足系统的实时性需求。文中设计通过对双集束型晶圆加工半导体设备中的出片限制、模块使用限制、禁止超片、阀门互斥限制、Just in Time共5个调度限制进行系统性分析,创新性地将加工仓任务池、机械臂任务池的任务调度问题抽象为混合整数规划(MIP)模型,并且基于数学规划求解器Gurobi进行快速求解,相较于传统算法求解速度提升了一个数量级。
基金Supported by the Open L ab.Foundation of Educational Ministryof China
文摘The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wheels respectively,are analyzed.In addition,considering the effects of grain size and grinding depth on surface grinding temperature during these two grinding processes,significant results and conclusions are obtained from experimental research.
