This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) unde...This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V_(nsoi)) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V_(psoi)) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V_(DD)=1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design.展开更多
The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area o...The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area of a standard 6T SRAM unit is approximately 0.16μm^(2),resulting in a significant enhancement of multi-cell charge-sharing effects.Multiple-cell upsets(MCUs)have become the primary physical mechanism behind single-event upsets(SEUs)in advanced nanometer node devices.The range of ionization track effects increases with higher ion energies,and spacecraft in orbit primarily experience SEUs caused by high-energy ions.However,ground accelerator experiments have mainly obtained low-energy ion irradiation data.Therefore,the impact of ion energy on the SEU cross section,charge collection mechanisms,and MCU patterns and quantities in advanced nanometer devices remains unclear.In this study,based on the experimental platform of the Heavy Ion Research Facility in Lanzhou,low-and high-energy heavy-ion beams were used to study the SEUs of 28 nm SRAM devices.The influence of ion energy on the charge collection processes of small-sensitive-volume devices,MCU patterns,and upset cross sections was obtained,and the applicable range of the inverse cosine law was clarified.The findings of this study are an important guide for the accurate evaluation of SEUs in advanced nanometer devices and for the development of radiation-hardening techniques.展开更多
AZ31-4.6% Mg2Si （mass fraction） composite was prepared by conventional casting method. Repetitive upsetting （RU） was applied to severely deforming the as-cast composite at 400 ℃ for 1, 3, and 5 passes. Finite ele...AZ31-4.6% Mg2Si （mass fraction） composite was prepared by conventional casting method. Repetitive upsetting （RU） was applied to severely deforming the as-cast composite at 400 ℃ for 1, 3, and 5 passes. Finite element analysis of the material flow indicates that deformation concentrates in the bottom region of the sample after 1 pass, and much more uniform deformation is obtained after 5 passes. During multi-pass RU process, both dendritic and Chinese script type Mg2Si phases are broken up into smaller particles owing to the shear stress forced by the matrix. With the increasing number of RU passes, finer grain size and more homogeneous distribution of Mg2Si particles are obtained along with significant enhancement in both strength and ductility. AZ31-4.6%Mg2Si composite exhibits tensile strength of 284 MPa and elongation of 9.8%after 5 RU passes at 400 ℃ compared with the initial 128 MPa and 5.4%of original AZ31-4.6%Mg2Si composite.展开更多
We study the problem of multiple node upset （MNU） using three-dimensional device simulation. The results show the transient floating node and charge lateral diffusion are the key reasons for MNU. We compare the MNU ...We study the problem of multiple node upset （MNU） using three-dimensional device simulation. The results show the transient floating node and charge lateral diffusion are the key reasons for MNU. We compare the MNU with multiple bit upset （MBU）,and find that their characteristics are different. Methods to avoid MNU are also discussed.展开更多
Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （...Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （SEU） cross sections under tilted ion strikes are overestimated by 23.9%-84.6%, compared with under normally incident ion with the equivalent linear energy transfer （LET） value of 41 MeV/（mg/cm2）, which can be partially explained by the fact that the MBU rate for tilted ions of 30° is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of - 9.5 MeV/（mg/cm2）, no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset （DBU） patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects （SEE） sensitivity, especially in MBU-sensitive devices.展开更多
The instantaneous reversible soft logic upset induced by the electromagnetic interference（EMI） severely affects the performances and reliabilities of complementary metal–oxide–semiconductor（CMOS） inverters. This...The instantaneous reversible soft logic upset induced by the electromagnetic interference（EMI） severely affects the performances and reliabilities of complementary metal–oxide–semiconductor（CMOS） inverters. This kind of soft logic upset is investigated in theory and simulation. Physics-based analysis is performed, and the result shows that the upset is caused by the non-equilibrium carrier accumulation in channels, which can ultimately lead to an abnormal turn-on of specific metal–oxide–semiconductor field-effect transistor（MOSFET） in CMOS inverter. Then a soft logic upset simulation model is introduced. Using this model, analysis of upset characteristic reveals an increasing susceptibility under higher injection powers, which accords well with experimental results, and the influences of EMI frequency and device size are studied respectively using the same model. The research indicates that in a range from L waveband to C waveband, lower interference frequency and smaller device size are more likely to be affected by the soft logic upset.展开更多
To effectively tolerate a double-node upset,a novel double-node-upset-resilient radiation-hardened latch is proposed in 22 nm complementary-metal-oxide-semiconductor technology.Using three interlocked single-node-upse...To effectively tolerate a double-node upset,a novel double-node-upset-resilient radiation-hardened latch is proposed in 22 nm complementary-metal-oxide-semiconductor technology.Using three interlocked single-node-upset-resilient cells,which are identically mainly constructed from three mutually feeding back 2-input C-elements,the latch achieves double-node-upset-resilience.Using smaller transistor sizes,clock-gating technology,and high-speed transmission-path,the cost of the latch is effectively reduced.Simulation results demonstrate the double-node-upset-resilience of the latch and also show that compared with the up-to-date double-node-upset-resilient latches,the proposed latch reduces the transmission delay by 72.54%,the power dissipation by 33.97%,and the delay-power-area product by 78.57%,while the average cost of the silicon area is only increased by 16.45%.展开更多
Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevit...Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevitably by neutrons.In this paper,a 3D die-stacked SRAM device is constructed based on a real planar SRAM device.Then,the single event upsets(SEUs)caused by neutrons with different energies are studied by the Monte Carlo method.The SEU cross-sections for each die and for the whole three-layer die-stacked SRAM device is obtained for neutrons with energy ranging from 1 MeV to 1000 MeV.The results indicate that the variation trend of the SEU cross-section for every single die and for the entire die-stacked device is consistent,but the specific values are different.The SEU cross-section is shown to be dependent on the threshold of linear energy transfer(LETth)and thickness of the sensitive volume(Tsv).The secondary particle distribution and energy deposition are analyzed,and the internal mechanism that is responsible for this difference is illustrated.Besides,the ratio and patterns of multiple bit upset(MBU)caused by neutrons with different energies are also presented.This work is helpful for the aerospace IC designers to understand the SEU mechanism of 3D ICs caused by neutrons irradiation.展开更多
The influences of reducing the supply voltage on single event upset(SEU) and multiple-cell upset(MCU) in two kinds of 65-nm static random access memories(SRAMs) are characterized across a wide linear energy transfer(L...The influences of reducing the supply voltage on single event upset(SEU) and multiple-cell upset(MCU) in two kinds of 65-nm static random access memories(SRAMs) are characterized across a wide linear energy transfer(LET) range.The results show that the influence of the voltage variation on SEU cross section clearly depends on the LET value which is above heavy ion LET threshold no matter whether the SRAM is non-hardened 6 T SRAM or radiation-hardened double dual interlocked cells(DICE) SRAM.When the LET value is lower than the LET threshold of MCU,the SEU only manifests single cell upset,the SEU cross section increases with the decrease of voltage.The lower the LET value,the higher the SEU sensitivity to the voltage variation is.Lowering the voltage has no evident influence on SEU cross section while the LET value is above the LET threshold of MCU.Moreover,the reduction of the voltage can result in a decrease in the highest-order MCU event cross section due to the decrease of charge collection efficiency of the outer sub-sensitive volume within a certain voltage range.With further scaling the feature size of devices down,it is suggested that the dependence of SEU on voltage variation should be paid special attention to for heavy ions with very low LET or the other particles with very low energy for nanometer commercial off-the-shelf(COTS) SRAM.展开更多
Heavy ion-induced single event upsets(SEUs)of static random access memory(SRAM), integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4...Heavy ion-induced single event upsets(SEUs)of static random access memory(SRAM), integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4 simulation toolkit. The SEU cross sections and multiple cell upset(MCU) susceptibility of 3D SRAM are explored using different types and energies of heavy ions.In the simulations, the sensitivities of different dies of 3D SRAM show noticeable discrepancies for low linear energy transfers(LETs). The average percentage of MCUs of 3D SRAM increases from 17.2 to 32.95%, followed by the energy of ^(209)Bi decreasing from 71.77 to 38.28 MeV/u. For a specific LET, the percentage of MCUs presents a notable difference between the face-to-face and back-toface structures. In the back-to-face structure, the percentage of MCUs increases with a deeper die, compared with the face-to-face structure. The simulation method and process are verified by comparing the SEU cross sections of planar SRAM with experimental data. The upset cross sections of the planar process and 3D integrated SRAM are analyzed. The results demonstrate that the 3D SRAM sensitivity is not greater than that of the planar SRAM. The 3D process technology has the potential to be applied to the aerospace and military fields.展开更多
We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device stru...We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indis- pensable effects on multiple-bit upsets （MBUs）, and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence.展开更多
A newly developed severe plastic deformation （SPD） technique, i.e. repetitive upsetting （RU）, is employed to improve the strength and ductility of a Mg-Gd-Y-Zr alloy. During the RU processing, dynamic recrystalliz...A newly developed severe plastic deformation （SPD） technique, i.e. repetitive upsetting （RU）, is employed to improve the strength and ductility of a Mg-Gd-Y-Zr alloy. During the RU processing, dynamic recrystallization occurs in the Mg alloy, which leads to a significant grain refinement from 11.2 p.m to 2.8 μm. The yield strength （YS）, ultimate tensile strength （UTS） and elongation increase simultaneously with increasing RU passes. The microstructural evolution is affected by processing temperatures. Dynamic recrystallization prevails at low temperatures, while dynamic recovery is the main effect factor at high temperatures. Texture characteristics gradually become random during multiple passes of RU processing, which reduces the tension-compression asymmetry of the Mg-Gd-Y-Zr alloy. 2018 Published by Elsevier Ltd on behalf of The editorial office of Journal of Materials Science ＆ Technology.展开更多
Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ^（129）Xe and ^（209）Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/（mg/c...Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ^（129）Xe and ^（209）Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/（mg/cm^2）. When the memory chips are powered off during heavy ions irradiation, single-event-latch-up and single-event-function-interruption are excluded,and only 0-〉1 upset errors in the memory array are observed. These error bit rates seem very difficult to achieve and cannot be simply recovered based on the power cycle. The number of error bits shows a strong dependence on the linear energy transfer（LET）. Under room-temperature annealing conditions, the upset errors can be reduced by about two orders of magnitude using rewrite/reprogram operations, but they subsequently increase once again in a few minutes after the power cycle. High-temperature annealing can diminish almost all error bits, which are affected by the lower LET ^（129）Xe ions. The percolation path between the floating-gate（FG） and the substrate contributes to the radiation-induced leakage current, and has been identified as the root cause of the upset errors of the Flash memory array in this work.展开更多
Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi...Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.展开更多
The breakage mechanism of W-Ni-Fe alloy in the process of electro-heat upsetting studied both theoretically and experimetnally, and also the behaviors of crack formation and propagation were analysed. Alloy suffers fr...The breakage mechanism of W-Ni-Fe alloy in the process of electro-heat upsetting studied both theoretically and experimetnally, and also the behaviors of crack formation and propagation were analysed. Alloy suffers from corrosion and thermal-mechanical fatigue mutual function. Simultaneously, the practical ways to improve the anvil life was discussed.展开更多
Isotropic magnets were prepared from melt-spun powders at different hot pressing temperatures from 550 to 700 ℃, then upset into fully dense anisotropic magnets at the same die-upsetting temperature of 850 ℃. Die-up...Isotropic magnets were prepared from melt-spun powders at different hot pressing temperatures from 550 to 700 ℃, then upset into fully dense anisotropic magnets at the same die-upsetting temperature of 850 ℃. Die-upset magnets had the characteristics of inhomogeneous microstructure, including well-aligned grains structure and nonaligned grains layers transverse to press direction, which was quasi-periodic layer structure with a total length of 5-15 μm. Nonaligned grains layers were mainly made of large grains and had higher Nd content. To clearly understand the formation of layer structure, the microstructure of isotropic precursors with different hot pressing temperatures and their subsequent die-upset magnets was investigated. A new interpretation for the formation of layer structure was proposed in this paper： the layer structure was correlated to the original ribbon interface which was divided into three types based on the contact forms. Because of the incomplete contact of neighboring ribbons, concentration of stress occurred in the contacted points and the Nd-rich phase was squeezed into interspaces at high temperature under stress. Due to the release of interfacial energy and the fluidity of enough Nd-rich liquid phases, the nonaligned layers with large grains formed both in hot compaction and subsequent hot deformation process. The layer structure affected the magnetic properties of die-upset magnets. With increase of the hot pressing temperature, the nonaligned grains layers became thicker, and the magnetic performance of die-upset magnets decreased. It was necessary to reduce the thickness of large grains layers for the preparation of high-performance die-upset magnets.展开更多
The microstructure and hardness of a 2024 aluminum alloy subjected tomulti-pass upsetting extrusion at ambient temperature were studied. Experimental results indicatedthat with the number of upsetting extrusion passes...The microstructure and hardness of a 2024 aluminum alloy subjected tomulti-pass upsetting extrusion at ambient temperature were studied. Experimental results indicatedthat with the number of upsetting extrusion passes increasing, the grains of the alloy are graduallyrefined and the hardness increases correspondingly. After ten passes of upsetting extrusionprocessing, the grain size decreases to less than 200 nm in diameter and the sample maintains itsoriginal shape, while the hardness is double owing to equal-axial ultrafine grains and workhardening effect caused by large plastic deformation.展开更多
A meshless approach, called the rigid-plastic reproducing kernel particle method （RKPM）, is presented for three-dimensional （3D） bulk metal forming simulation. The approach is a combination of RKPM with the flow t...A meshless approach, called the rigid-plastic reproducing kernel particle method （RKPM）, is presented for three-dimensional （3D） bulk metal forming simulation. The approach is a combination of RKPM with the flow theory of 3D rigid-plastic mechanics. For the treatments of essential boundary conditions and incompressibility constraint, the boundary singular kernel method and the modified penalty method are utilized, respectively. The arc-tangential friction model is employed to treat the contact conditions. The compression of rectangular blocks, a typical 3D upsetting operation, is analyzed for different friction conditions and the numerical results are compared with those obtained using commercial rigid-plastic FEM （finite element method） software Deform^3D. As results show, when handling 3D plastic deformations, the proposed approach eliminates the need of expensive meshing and remeshing procedures which are unavoidable in conventional FEM and can provide results that are in good agreement with finite element predictions.展开更多
Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigate...Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated.It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing,which is quite attractive for dynamic voltage scaling and subthreshold circuit radiation-hardened design.Additionally,the effect of supply voltage on charge collection is also investigated.It is concluded that the supply voltage mainly affects the bipolar gain of the parasitical bipolar junction transistor（BJT） and the existence of the source plays an important role in supply voltage variation.展开更多
The magnetic properties and microstructure of Nd-Fe-B magnets prepared by spark plasma sintering with different die-upsetting processes were investigated. The results showed that the optimum magnetic properties of die...The magnetic properties and microstructure of Nd-Fe-B magnets prepared by spark plasma sintering with different die-upsetting processes were investigated. The results showed that the optimum magnetic properties of die-upset Nd-Fe-B magnets were obtained at 680 ℃ when the die-upset level was 60%, and the degree of magnetic alignment was 0.84. The microstructures showed that the coarse grains oc-curred predominantly within certain areas, and abnormal grain growth was not observed within the major areas of well-aligned grains. There existed many small spherical grains, which stacked together and were not aligned during die upsetting when the deformation temperature was 650 ℃. These small spherical grains grew up, and were aligned when the deformation temperature increased from 650 to 680 ℃, which could improve the crystallographic alignment of die-upset Nd-Fe-B magnets.展开更多
基金supported by the National Key Laboratory of Materials Behavior and Evaluation Technology in Space Environment(No.6142910220208)National Natural Science Foundation of China(Nos.12105341 and 12035019)the opening fund of Key Laboratory of Silicon Device and Technology,Chinese Academy of Sciences(No.KLSDTJJ2022-3).
文摘This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V_(nsoi)) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V_(psoi)) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V_(DD)=1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design.
基金supported by the National Natural Science Foundation of China(Nos.12105341 and 12035019)the opening fund of Key Laboratory of Silicon Device and Technology,Chinese Academy of Sciences(No.KLSDTJJ2022-3).
文摘The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area of a standard 6T SRAM unit is approximately 0.16μm^(2),resulting in a significant enhancement of multi-cell charge-sharing effects.Multiple-cell upsets(MCUs)have become the primary physical mechanism behind single-event upsets(SEUs)in advanced nanometer node devices.The range of ionization track effects increases with higher ion energies,and spacecraft in orbit primarily experience SEUs caused by high-energy ions.However,ground accelerator experiments have mainly obtained low-energy ion irradiation data.Therefore,the impact of ion energy on the SEU cross section,charge collection mechanisms,and MCU patterns and quantities in advanced nanometer devices remains unclear.In this study,based on the experimental platform of the Heavy Ion Research Facility in Lanzhou,low-and high-energy heavy-ion beams were used to study the SEUs of 28 nm SRAM devices.The influence of ion energy on the charge collection processes of small-sensitive-volume devices,MCU patterns,and upset cross sections was obtained,and the applicable range of the inverse cosine law was clarified.The findings of this study are an important guide for the accurate evaluation of SEUs in advanced nanometer devices and for the development of radiation-hardening techniques.
基金Projects(51074106,51374145)supported by the National Natural Science Foundation of ChinaProject(09JC1408200)supported by the Science and Technology Commission of Shanghai Municipality,China+1 种基金Project(2014M561466)supported by China Postdoctoral Science FoundationProject(14R21411000)supported by Shanghai Postdoctoral Scientific Program,China
文摘AZ31-4.6% Mg2Si （mass fraction） composite was prepared by conventional casting method. Repetitive upsetting （RU） was applied to severely deforming the as-cast composite at 400 ℃ for 1, 3, and 5 passes. Finite element analysis of the material flow indicates that deformation concentrates in the bottom region of the sample after 1 pass, and much more uniform deformation is obtained after 5 passes. During multi-pass RU process, both dendritic and Chinese script type Mg2Si phases are broken up into smaller particles owing to the shear stress forced by the matrix. With the increasing number of RU passes, finer grain size and more homogeneous distribution of Mg2Si particles are obtained along with significant enhancement in both strength and ductility. AZ31-4.6%Mg2Si composite exhibits tensile strength of 284 MPa and elongation of 9.8%after 5 RU passes at 400 ℃ compared with the initial 128 MPa and 5.4%of original AZ31-4.6%Mg2Si composite.
文摘We study the problem of multiple node upset （MNU） using three-dimensional device simulation. The results show the transient floating node and charge lateral diffusion are the key reasons for MNU. We compare the MNU with multiple bit upset （MBU）,and find that their characteristics are different. Methods to avoid MNU are also discussed.
基金supported by the National Natural Science Foundation of China(Grant Nos.11179003,10975164,10805062,and 11005134)
文摘Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （SEU） cross sections under tilted ion strikes are overestimated by 23.9%-84.6%, compared with under normally incident ion with the equivalent linear energy transfer （LET） value of 41 MeV/（mg/cm2）, which can be partially explained by the fact that the MBU rate for tilted ions of 30° is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of - 9.5 MeV/（mg/cm2）, no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset （DBU） patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects （SEE） sensitivity, especially in MBU-sensitive devices.
基金supported by the National Natural Science Foundation of China(Grant No.60776034)the Open Fund of Key Laboratory of Complex Electromagnetic Environment Science and Technology,China Academy of Engineering Physics(Grant No.2015-0214.XY.K)
文摘The instantaneous reversible soft logic upset induced by the electromagnetic interference（EMI） severely affects the performances and reliabilities of complementary metal–oxide–semiconductor（CMOS） inverters. This kind of soft logic upset is investigated in theory and simulation. Physics-based analysis is performed, and the result shows that the upset is caused by the non-equilibrium carrier accumulation in channels, which can ultimately lead to an abnormal turn-on of specific metal–oxide–semiconductor field-effect transistor（MOSFET） in CMOS inverter. Then a soft logic upset simulation model is introduced. Using this model, analysis of upset characteristic reveals an increasing susceptibility under higher injection powers, which accords well with experimental results, and the influences of EMI frequency and device size are studied respectively using the same model. The research indicates that in a range from L waveband to C waveband, lower interference frequency and smaller device size are more likely to be affected by the soft logic upset.
基金The National Natural Science Foundation of China(No.61604001)the Doctor Startup Fund of Anhui University(No.J01003217)
文摘To effectively tolerate a double-node upset,a novel double-node-upset-resilient radiation-hardened latch is proposed in 22 nm complementary-metal-oxide-semiconductor technology.Using three interlocked single-node-upset-resilient cells,which are identically mainly constructed from three mutually feeding back 2-input C-elements,the latch achieves double-node-upset-resilience.Using smaller transistor sizes,clock-gating technology,and high-speed transmission-path,the cost of the latch is effectively reduced.Simulation results demonstrate the double-node-upset-resilience of the latch and also show that compared with the up-to-date double-node-upset-resilient latches,the proposed latch reduces the transmission delay by 72.54%,the power dissipation by 33.97%,and the delay-power-area product by 78.57%,while the average cost of the silicon area is only increased by 16.45%.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.12035019,111690041,and 11675233)the Project of Science and Technology on Analog Integrated Circuit Laboratory,China(Grant No.6142802WD201801).
文摘Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevitably by neutrons.In this paper,a 3D die-stacked SRAM device is constructed based on a real planar SRAM device.Then,the single event upsets(SEUs)caused by neutrons with different energies are studied by the Monte Carlo method.The SEU cross-sections for each die and for the whole three-layer die-stacked SRAM device is obtained for neutrons with energy ranging from 1 MeV to 1000 MeV.The results indicate that the variation trend of the SEU cross-section for every single die and for the entire die-stacked device is consistent,but the specific values are different.The SEU cross-section is shown to be dependent on the threshold of linear energy transfer(LETth)and thickness of the sensitive volume(Tsv).The secondary particle distribution and energy deposition are analyzed,and the internal mechanism that is responsible for this difference is illustrated.Besides,the ratio and patterns of multiple bit upset(MBU)caused by neutrons with different energies are also presented.This work is helpful for the aerospace IC designers to understand the SEU mechanism of 3D ICs caused by neutrons irradiation.
基金Project supported by the Major Program of the National Natural Science Foundation of China(Grant Nos.11690043 and 11690040)。
文摘The influences of reducing the supply voltage on single event upset(SEU) and multiple-cell upset(MCU) in two kinds of 65-nm static random access memories(SRAMs) are characterized across a wide linear energy transfer(LET) range.The results show that the influence of the voltage variation on SEU cross section clearly depends on the LET value which is above heavy ion LET threshold no matter whether the SRAM is non-hardened 6 T SRAM or radiation-hardened double dual interlocked cells(DICE) SRAM.When the LET value is lower than the LET threshold of MCU,the SEU only manifests single cell upset,the SEU cross section increases with the decrease of voltage.The lower the LET value,the higher the SEU sensitivity to the voltage variation is.Lowering the voltage has no evident influence on SEU cross section while the LET value is above the LET threshold of MCU.Moreover,the reduction of the voltage can result in a decrease in the highest-order MCU event cross section due to the decrease of charge collection efficiency of the outer sub-sensitive volume within a certain voltage range.With further scaling the feature size of devices down,it is suggested that the dependence of SEU on voltage variation should be paid special attention to for heavy ions with very low LET or the other particles with very low energy for nanometer commercial off-the-shelf(COTS) SRAM.
基金supported by the Fundamental Research Funds for the Central Universities(No.HIT.KISTP.201404)Harbin science and innovation research special fund(No.2015RAXXJ003)Special fund for development of Shenzhen strategic emerging industries(No.JCYJ20150625142543456)
文摘Heavy ion-induced single event upsets(SEUs)of static random access memory(SRAM), integrated with three-dimensional integrated circuit technology, are evaluated using a Monte Carlo simulation method based on the Geant4 simulation toolkit. The SEU cross sections and multiple cell upset(MCU) susceptibility of 3D SRAM are explored using different types and energies of heavy ions.In the simulations, the sensitivities of different dies of 3D SRAM show noticeable discrepancies for low linear energy transfers(LETs). The average percentage of MCUs of 3D SRAM increases from 17.2 to 32.95%, followed by the energy of ^(209)Bi decreasing from 71.77 to 38.28 MeV/u. For a specific LET, the percentage of MCUs presents a notable difference between the face-to-face and back-toface structures. In the back-to-face structure, the percentage of MCUs increases with a deeper die, compared with the face-to-face structure. The simulation method and process are verified by comparing the SEU cross sections of planar SRAM with experimental data. The upset cross sections of the planar process and 3D integrated SRAM are analyzed. The results demonstrate that the 3D SRAM sensitivity is not greater than that of the planar SRAM. The 3D process technology has the potential to be applied to the aerospace and military fields.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 11179003, 10975164, 10805062, and 11005134)
文摘We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indis- pensable effects on multiple-bit upsets （MBUs）, and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence.
基金supported by the National Key R&D Program of China (grant number 2017YFA0204403)the National Natural Science Foundation of China (NSFC) under Grant Nos. 51601003, 51301092, 51404151, 51401172+1 种基金Project supported by Beijing Postdoctoral Research Foundation under Grant No. 2016ZZ-02Project of Science & Technology Department of Sichuan Province (No. 2015HH0012)
文摘A newly developed severe plastic deformation （SPD） technique, i.e. repetitive upsetting （RU）, is employed to improve the strength and ductility of a Mg-Gd-Y-Zr alloy. During the RU processing, dynamic recrystallization occurs in the Mg alloy, which leads to a significant grain refinement from 11.2 p.m to 2.8 μm. The yield strength （YS）, ultimate tensile strength （UTS） and elongation increase simultaneously with increasing RU passes. The microstructural evolution is affected by processing temperatures. Dynamic recrystallization prevails at low temperatures, while dynamic recovery is the main effect factor at high temperatures. Texture characteristics gradually become random during multiple passes of RU processing, which reduces the tension-compression asymmetry of the Mg-Gd-Y-Zr alloy. 2018 Published by Elsevier Ltd on behalf of The editorial office of Journal of Materials Science ＆ Technology.
基金Project supported by the National Natural Science Foundation of China(Grant No.616340084)the Youth Innovation Promotion Association of CAS(Grant No.2014101)+1 种基金the International Cooperation Project of CASthe Austrian-Chinese Cooperative R&D Projects(Grant No.172511KYSB20150006)
文摘Upset errors in 90-nm 64 Mb NOR-type floating-gate Flash memory induced by accelerated ^（129）Xe and ^（209）Bi ions are investigated in detail. The linear energy transfer covers the range from 50 to 99.8 Me V/（mg/cm^2）. When the memory chips are powered off during heavy ions irradiation, single-event-latch-up and single-event-function-interruption are excluded,and only 0-〉1 upset errors in the memory array are observed. These error bit rates seem very difficult to achieve and cannot be simply recovered based on the power cycle. The number of error bits shows a strong dependence on the linear energy transfer（LET）. Under room-temperature annealing conditions, the upset errors can be reduced by about two orders of magnitude using rewrite/reprogram operations, but they subsequently increase once again in a few minutes after the power cycle. High-temperature annealing can diminish almost all error bits, which are affected by the lower LET ^（129）Xe ions. The percolation path between the floating-gate（FG） and the substrate contributes to the radiation-induced leakage current, and has been identified as the root cause of the upset errors of the Flash memory array in this work.
基金supported by the State Key Program of the National Natural Science Foundation of China (Grant No.60836004)the National Natural Science Foundation of China (Grant Nos.61076025 and 61006070)
文摘Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.
文摘The breakage mechanism of W-Ni-Fe alloy in the process of electro-heat upsetting studied both theoretically and experimetnally, and also the behaviors of crack formation and propagation were analysed. Alloy suffers from corrosion and thermal-mechanical fatigue mutual function. Simultaneously, the practical ways to improve the anvil life was discussed.
基金Project supported by National High-Tech R&D Program of China(2010AA03A401)the National Natural Science Foundation of China(50931001,51241009)
文摘Isotropic magnets were prepared from melt-spun powders at different hot pressing temperatures from 550 to 700 ℃, then upset into fully dense anisotropic magnets at the same die-upsetting temperature of 850 ℃. Die-upset magnets had the characteristics of inhomogeneous microstructure, including well-aligned grains structure and nonaligned grains layers transverse to press direction, which was quasi-periodic layer structure with a total length of 5-15 μm. Nonaligned grains layers were mainly made of large grains and had higher Nd content. To clearly understand the formation of layer structure, the microstructure of isotropic precursors with different hot pressing temperatures and their subsequent die-upset magnets was investigated. A new interpretation for the formation of layer structure was proposed in this paper： the layer structure was correlated to the original ribbon interface which was divided into three types based on the contact forms. Because of the incomplete contact of neighboring ribbons, concentration of stress occurred in the contacted points and the Nd-rich phase was squeezed into interspaces at high temperature under stress. Due to the release of interfacial energy and the fluidity of enough Nd-rich liquid phases, the nonaligned layers with large grains formed both in hot compaction and subsequent hot deformation process. The layer structure affected the magnetic properties of die-upset magnets. With increase of the hot pressing temperature, the nonaligned grains layers became thicker, and the magnetic performance of die-upset magnets decreased. It was necessary to reduce the thickness of large grains layers for the preparation of high-performance die-upset magnets.
基金This project is financially supported by the Natural Science Foundation (No. E5305293) of South China University of Technology.
文摘The microstructure and hardness of a 2024 aluminum alloy subjected tomulti-pass upsetting extrusion at ambient temperature were studied. Experimental results indicatedthat with the number of upsetting extrusion passes increasing, the grains of the alloy are graduallyrefined and the hardness increases correspondingly. After ten passes of upsetting extrusionprocessing, the grain size decreases to less than 200 nm in diameter and the sample maintains itsoriginal shape, while the hardness is double owing to equal-axial ultrafine grains and workhardening effect caused by large plastic deformation.
基金This work was supported by the National Natural Science Foundation of China （No. 50275094）.
文摘A meshless approach, called the rigid-plastic reproducing kernel particle method （RKPM）, is presented for three-dimensional （3D） bulk metal forming simulation. The approach is a combination of RKPM with the flow theory of 3D rigid-plastic mechanics. For the treatments of essential boundary conditions and incompressibility constraint, the boundary singular kernel method and the modified penalty method are utilized, respectively. The arc-tangential friction model is employed to treat the contact conditions. The compression of rectangular blocks, a typical 3D upsetting operation, is analyzed for different friction conditions and the numerical results are compared with those obtained using commercial rigid-plastic FEM （finite element method） software Deform^3D. As results show, when handling 3D plastic deformations, the proposed approach eliminates the need of expensive meshing and remeshing procedures which are unavoidable in conventional FEM and can provide results that are in good agreement with finite element predictions.
基金Project supported by the State Key Program of the National Natural Science Foundation of China (Grant No. 60836004)Hunan Provincial Innovation Foundation for Postgraduates,China (Grant No. CX2011B026)
文摘Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated.It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing,which is quite attractive for dynamic voltage scaling and subthreshold circuit radiation-hardened design.Additionally,the effect of supply voltage on charge collection is also investigated.It is concluded that the supply voltage mainly affects the bipolar gain of the parasitical bipolar junction transistor（BJT） and the existence of the source plays an important role in supply voltage variation.
基金supported by the National Natural Science Foundation of China (50801049)
文摘The magnetic properties and microstructure of Nd-Fe-B magnets prepared by spark plasma sintering with different die-upsetting processes were investigated. The results showed that the optimum magnetic properties of die-upset Nd-Fe-B magnets were obtained at 680 ℃ when the die-upset level was 60%, and the degree of magnetic alignment was 0.84. The microstructures showed that the coarse grains oc-curred predominantly within certain areas, and abnormal grain growth was not observed within the major areas of well-aligned grains. There existed many small spherical grains, which stacked together and were not aligned during die upsetting when the deformation temperature was 650 ℃. These small spherical grains grew up, and were aligned when the deformation temperature increased from 650 to 680 ℃, which could improve the crystallographic alignment of die-upset Nd-Fe-B magnets.
