Many existing real time commit protocols try to improve system performance by allowing a committing cohort to lend its data to an executing cohort, thus reducing data inaccessibility. They block the borrower from send...Many existing real time commit protocols try to improve system performance by allowing a committing cohort to lend its data to an executing cohort, thus reducing data inaccessibility. They block the borrower from sending WORKDONE/PREPARED message and restrict them from lending data so that transaction abort chain is limited to one. Thus, transaction execution time increases. This paper proposes a modified real time commit protocol for distributed real time database systems (DRTDBS), Allow Commit Dependent and in Time borrowers for Incredible Value added data lending without extended abort chain (ACTIVE), where borrower cohorts are categorized as commit and abort dependent. Further, the commit dependent borrowers can lend data to executing cohorts with still limiting the transaction abort chain to one only and reducing the data inaccessibility. Also, an incoming executing cohort having borrowing factor greater than one can only borrow the dirty data items from lender. This minimizes the fruitless borrowing by the cohort. The performance of ACTIVE is compared with PROMPT, 2SC and SWIFT protocols for both main memory resident and disk resident databases with and without communication delay. Simulation results show that the proposed protocol improves the system performance up to 4% as transaction miss percentage.展开更多
For the purpose of solving the shortcomings of low speed and high power consumption of asynchronous wrapper in conventional network on chips,this paper proposes a quasi delay-insensitive high-speed two-phase operation...For the purpose of solving the shortcomings of low speed and high power consumption of asynchronous wrapper in conventional network on chips,this paper proposes a quasi delay-insensitive high-speed two-phase operation mode asynchronous wrapper.The metastable state in sampling data procedure can be avoided by detecting the write/read signal, which can be used to stop the clock.Empty/full level of the registers can be determined by detecting the pulse signal of the two-phase asynchronous register,and then control the wrapper to sample input/output data.Sender wrapper and receiver wrapper consist of C elements and threshold gates,which ensure the quasi delay-insensitive characteristics and enhance the robustness.Simulations under different technology corners are implemented based on SMIC 0.18μm standard CMOS. Sender wrapper and receiver wrapper allow synchronous modules to work at the speed of 3.08 GHz and 2.98 GHz respectively with average dynamic power consumption of 1.727 mW and 1.779 mW.Its advantages of high-throughput,low-power, scalability and robustness make it a viable option for high-speed low-power interconnection of network-on-chip.展开更多
In the evolving landscape of software engineering, Microservice Architecture (MSA) has emerged as a transformative approach, facilitating enhanced scalability, agility, and independent service deployment. This systema...In the evolving landscape of software engineering, Microservice Architecture (MSA) has emerged as a transformative approach, facilitating enhanced scalability, agility, and independent service deployment. This systematic literature review (SLR) explores the current state of distributed transaction management within MSA, focusing on the unique challenges, strategies, and technologies utilized in this domain. By synthesizing findings from 16 primary studies selected based on rigorous criteria, the review identifies key trends and best practices for maintaining data consistency and integrity across microservices. This SLR provides a comprehensive understanding of the complexities associated with distributed transactions in MSA, offering actionable insights and potential research directions for software architects, developers, and researchers.展开更多
文摘Many existing real time commit protocols try to improve system performance by allowing a committing cohort to lend its data to an executing cohort, thus reducing data inaccessibility. They block the borrower from sending WORKDONE/PREPARED message and restrict them from lending data so that transaction abort chain is limited to one. Thus, transaction execution time increases. This paper proposes a modified real time commit protocol for distributed real time database systems (DRTDBS), Allow Commit Dependent and in Time borrowers for Incredible Value added data lending without extended abort chain (ACTIVE), where borrower cohorts are categorized as commit and abort dependent. Further, the commit dependent borrowers can lend data to executing cohorts with still limiting the transaction abort chain to one only and reducing the data inaccessibility. Also, an incoming executing cohort having borrowing factor greater than one can only borrow the dirty data items from lender. This minimizes the fruitless borrowing by the cohort. The performance of ACTIVE is compared with PROMPT, 2SC and SWIFT protocols for both main memory resident and disk resident databases with and without communication delay. Simulation results show that the proposed protocol improves the system performance up to 4% as transaction miss percentage.
基金Supported by the National Natural Science Foundation of China under Grant Nos.60725415,60971066the National High-Tech Research and Development 863 Program of China under Grant Nos.2009AA01Z258,2009AA01Z260the National Science & Technology Important Project under Grant No.2009ZX01034-002-001-005.
文摘For the purpose of solving the shortcomings of low speed and high power consumption of asynchronous wrapper in conventional network on chips,this paper proposes a quasi delay-insensitive high-speed two-phase operation mode asynchronous wrapper.The metastable state in sampling data procedure can be avoided by detecting the write/read signal, which can be used to stop the clock.Empty/full level of the registers can be determined by detecting the pulse signal of the two-phase asynchronous register,and then control the wrapper to sample input/output data.Sender wrapper and receiver wrapper consist of C elements and threshold gates,which ensure the quasi delay-insensitive characteristics and enhance the robustness.Simulations under different technology corners are implemented based on SMIC 0.18μm standard CMOS. Sender wrapper and receiver wrapper allow synchronous modules to work at the speed of 3.08 GHz and 2.98 GHz respectively with average dynamic power consumption of 1.727 mW and 1.779 mW.Its advantages of high-throughput,low-power, scalability and robustness make it a viable option for high-speed low-power interconnection of network-on-chip.
文摘In the evolving landscape of software engineering, Microservice Architecture (MSA) has emerged as a transformative approach, facilitating enhanced scalability, agility, and independent service deployment. This systematic literature review (SLR) explores the current state of distributed transaction management within MSA, focusing on the unique challenges, strategies, and technologies utilized in this domain. By synthesizing findings from 16 primary studies selected based on rigorous criteria, the review identifies key trends and best practices for maintaining data consistency and integrity across microservices. This SLR provides a comprehensive understanding of the complexities associated with distributed transactions in MSA, offering actionable insights and potential research directions for software architects, developers, and researchers.
