The robust parameter design method is a traditional approach to robust experimental design that seeks to obtain the optimal combination of factors/levels. To overcome some of the defects of the inflatable wing paramet...The robust parameter design method is a traditional approach to robust experimental design that seeks to obtain the optimal combination of factors/levels. To overcome some of the defects of the inflatable wing parameter design method, this paper proposes an optimization design scheme based on orthogonal testing and support vector machines （SVMs）. Orthogonal testing design is used to estimate the appropriate initial value and variation domain of each variable to decrease the number of iterations and improve the identification accuracy and efficiency. Orthogonal tests consisting of three factors and three levels are designed to analyze the parameters of pressure, uniform applied load and the number of chambers that affect the bending response of inflatable wings. An SVM intelligent model is established and limited orthogonal test swatches are studied. Thus, the precise relationships between each parameter and product quality features, as well the signal-to-noise ratio （SNR）, can be obtained. This can guide general technological design optimization.展开更多
Diagnosing intermittent fault is an important approach to reduce built-in test（BIT） false alarms. Aiming at solving the shortcoming of the present diagnostic method of intermittent fault, and according to the merit ...Diagnosing intermittent fault is an important approach to reduce built-in test（BIT） false alarms. Aiming at solving the shortcoming of the present diagnostic method of intermittent fault, and according to the merit of support vector machines （ SVM） which can be trained with a small-sample, an SVM-based diagnostic model of 3 states that include OK state, intermittent state and faulty state is presented. With the features based on the reflection coefficients of an alarm rate （ AR ） model extracted from small vibration samples, these models are trained to diagnose intermittent faults. The experimental results show that this method can diagnose multiple intermittent faults accurately with small training samples and BIT false alarms are reduced.展开更多
This paper presents modified version of a realistic test tool suitable to Design For Testability （DFT） and Built-ln Self Test （BIST） environments. A comprehensive tool is developed in the form of a test simulator....This paper presents modified version of a realistic test tool suitable to Design For Testability （DFT） and Built-ln Self Test （BIST） environments. A comprehensive tool is developed in the form of a test simulator. The simulator is capable of providing a required goal of test for the Circuit Under Test （CUT）. The simulator uses the approach of fault diagnostics with fault grading procedures to provide the optimum tests. The current version of the simulator embeds features of exhaustive and pseudo-random test generation schemes along with the search solutions of cost effective test goals. The simulator provides facilities of realizing all possible pseudo-random sequence generators with all possible combinations of seeds. The tool is developed on a common Personal Computer （PC） platform and hence no special software is required. Thereby, it is a low cost tool hence economical. The tool is very much suitable for determining realistic test sequences for a targeted goal of testing for any CUT. The developed tool incorporates flexible Graphical User Interface （GUI） procedures and can be operated without any special programming skill. The tool is debugged and tested with the results of many bench mark circuits. Further, this developed tool can be utilized for educational purposes for many courses such as fault-tolerant computing, fault diagnosis, digital electronics, and safe-reliable-testable digital logic designs.展开更多
文摘The robust parameter design method is a traditional approach to robust experimental design that seeks to obtain the optimal combination of factors/levels. To overcome some of the defects of the inflatable wing parameter design method, this paper proposes an optimization design scheme based on orthogonal testing and support vector machines （SVMs）. Orthogonal testing design is used to estimate the appropriate initial value and variation domain of each variable to decrease the number of iterations and improve the identification accuracy and efficiency. Orthogonal tests consisting of three factors and three levels are designed to analyze the parameters of pressure, uniform applied load and the number of chambers that affect the bending response of inflatable wings. An SVM intelligent model is established and limited orthogonal test swatches are studied. Thus, the precise relationships between each parameter and product quality features, as well the signal-to-noise ratio （SNR）, can be obtained. This can guide general technological design optimization.
文摘Diagnosing intermittent fault is an important approach to reduce built-in test（BIT） false alarms. Aiming at solving the shortcoming of the present diagnostic method of intermittent fault, and according to the merit of support vector machines （ SVM） which can be trained with a small-sample, an SVM-based diagnostic model of 3 states that include OK state, intermittent state and faulty state is presented. With the features based on the reflection coefficients of an alarm rate （ AR ） model extracted from small vibration samples, these models are trained to diagnose intermittent faults. The experimental results show that this method can diagnose multiple intermittent faults accurately with small training samples and BIT false alarms are reduced.
文摘This paper presents modified version of a realistic test tool suitable to Design For Testability （DFT） and Built-ln Self Test （BIST） environments. A comprehensive tool is developed in the form of a test simulator. The simulator is capable of providing a required goal of test for the Circuit Under Test （CUT）. The simulator uses the approach of fault diagnostics with fault grading procedures to provide the optimum tests. The current version of the simulator embeds features of exhaustive and pseudo-random test generation schemes along with the search solutions of cost effective test goals. The simulator provides facilities of realizing all possible pseudo-random sequence generators with all possible combinations of seeds. The tool is developed on a common Personal Computer （PC） platform and hence no special software is required. Thereby, it is a low cost tool hence economical. The tool is very much suitable for determining realistic test sequences for a targeted goal of testing for any CUT. The developed tool incorporates flexible Graphical User Interface （GUI） procedures and can be operated without any special programming skill. The tool is debugged and tested with the results of many bench mark circuits. Further, this developed tool can be utilized for educational purposes for many courses such as fault-tolerant computing, fault diagnosis, digital electronics, and safe-reliable-testable digital logic designs.
