With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a paramet...With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz. The simulation and experimental results verify that the test circuit with a radial stub is better than that without. As an example, a C-band AlGaN/GaN HEMT microwave power device is tested with the designed circuit and fixture. With a 5.4GHz microwave input signal,the maximum gain is 8.75dB,and the maximum output power is 33.2dBm.展开更多
With the growth of capacity of high voltage direct current(HVDC) transmission lines,the ratings of thyristor valves,which are one of the most critical equipments,are getting higher and higher.Verification of performan...With the growth of capacity of high voltage direct current(HVDC) transmission lines,the ratings of thyristor valves,which are one of the most critical equipments,are getting higher and higher.Verification of performance of thyristor valves particularly designed for HVDC project plays an important role in the handover of products between the manufacturer and the client.Conventional test facilities based on philosophy of direct test cannot meet the requirements for modern thyristor valves.New test facilities with high ratings are necessarily built based on philosophy of synthetic test.Over the conventional direct test circuit,the later is an economical and feasible solution with less financial investment and higher test capability.However,the equivalency between the synthetic test and the direct test should be analyzed technically in order to make sure that the condition of verification test in a synthetic test circuit should satisfy the actual operation condition of thyristor valves existing in a real HVDC project,just as in a direct test circuit.Equivalency analysis is focused in this paper,covering the scope of thyristor valves' steady state,and transient state.On the basis of the results achieved,a synthetic test circuit of 6 500 A/50 kV for operational tests of thyristor valves used for up to UHVDC project has newly been set up and already put into service in Xi'an High Voltage Apparatus Research Institute Co.,Ltd.(XIHARI),China.Some of the results have been adopted also by a new national standard of China.展开更多
With the principles of microwave circuits and semiconductor device physics,three kinds of microwave power device test circuits are designed and simulated,whose properties are evaluated by a parameter network analyzer ...With the principles of microwave circuits and semiconductor device physics,three kinds of microwave power device test circuits are designed and simulated,whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz.The simulated results verify that the test circuit with stepped-impedance filter bias network has a larger bandwidth than that with the radial stub.A microstrip interdigital capacitor is used in the third test circuit to replace the DC block,however,which does not show its advantage during the test frequency band.Based on the simulated results,the stepped-impedance filter test circuit can be used to evaluate microwave power devices in the whole C band,namely from 4 to 8GHz.展开更多
We review the short-circuit testing of distribution and power transformers, and include a list of 110-220kV power transformers tested up to February 2002.
A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130？nm CMOS bulk Si and silicon-on-insulator （SOI） technologies. The effectiveness of linear energy transf...A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130？nm CMOS bulk Si and silicon-on-insulator （SOI） technologies. The effectiveness of linear energy transfer （LET） with a tilted ion beam at the 130？nm technology node is obtained. Tests of tilted angles θ=0 ° , 30 ° and 60 ° with respect to the normal direction are performed under heavy-ion Kr with certain power whose LET is about 40？MeVcm 2 /mg at normal incidence. Error numbers in D flip-flop chains are used to determine their upset sensitivity at different incidence angles. It is indicated that the effective LETs for SOI and bulk Si are not exactly in inverse proportion to cosθ , furthermore the effective LET for SOI is more closely in inverse proportion to cosθ compared to bulk Si, which are also the well known behavior. It is interesting that, if we design the sample in the dual interlocked storage cell approach, the effective LET in bulk Si will look like inversely proportional to cosθ very well, which is also specifically explained.展开更多
The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore ...The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.展开更多
An important means for digital circuit analysis, design. maintenance and production is the IC chip test and analysis. With digital circuit application prevailing today, the automatic test and analysis of digital circu...An important means for digital circuit analysis, design. maintenance and production is the IC chip test and analysis. With digital circuit application prevailing today, the automatic test and analysis of digital circuits is going to play a more important role. It can save a great deal of time and cost for the maintenance of equipment and can also provide correst analytical data for designers.展开更多
In the Paper,the author introduces an embedded design verification test based on specific chips to solve the technical problems of microwave circuit test and fault diagnosis.The author explains embedded design of micr...In the Paper,the author introduces an embedded design verification test based on specific chips to solve the technical problems of microwave circuit test and fault diagnosis.The author explains embedded design of microwave circuit modules and approach of hardware design and software design,and finally verifies the embedded design of microwave circuit modules based on specific chips.展开更多
Firstly, relevant stress properties of millisecond level breaking process and microsecond level commutation process of hybrid HVDC circuit breaker are studied in detail on the basis of the analysis for the application...Firstly, relevant stress properties of millisecond level breaking process and microsecond level commutation process of hybrid HVDC circuit breaker are studied in detail on the basis of the analysis for the application environment and topological structure and operating principles of hybrid circuit breakers, and key stress parameters in transient state process of two time dimensions are extracted. The established digital simulation circuit for PSCAD/EMTDC device-level operation of the circuit breaker has verified the stress properties of millisecond level breaking process and microsecond level commutation process. Then, equivalent test method, circuits and parameters based on LC power supply are proposed on the basis of stress extraction. Finally, the results of implemented breaking tests for complete 200 kV circuit breaker, 100 kV and 50 kV circuit breaker units, as well as single power electronic module have verified the accuracy of the simulation circuit and mathematical analysis. The result of this paper can be a guide to electrical structure and test system design of hybrid HVDC circuit breaker.展开更多
Based on the recommendation of ICTD＇09 TPC members, this Special Issue of the Journal of Electronic Science ＆ Technology of China （JESTC） contained 22 high quality papers selected from the Proceedings of 2009 IEEE...Based on the recommendation of ICTD＇09 TPC members, this Special Issue of the Journal of Electronic Science ＆ Technology of China （JESTC） contained 22 high quality papers selected from the Proceedings of 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis （ICTD ＇09） which is fully sponsored by the IEEE Circuits and Systems Society （CASS）, and is technically co-sponsored by the University of Electronic Science and Technology of China （UESTC）, the Chinese Institute of Electronics （CIE）, the China Instrument ＆ Control Society （CIS）, and organized by UESTC.展开更多
Thyristor valve is one of the key equipments for ultra high voltage direct current(UHVDC) power transmission projects.Before being installed on site,they need to be tested in a laboratory in order to verify their oper...Thyristor valve is one of the key equipments for ultra high voltage direct current(UHVDC) power transmission projects.Before being installed on site,they need to be tested in a laboratory in order to verify their operational performance to satisfy the technical specification of project related.Test facilities for operational tests of thyristor valves are supposed to enable to undertake more severe electrical stresses than those being applied in the thyristor valves under test(test objects).On the other hand,the stresses applied into the test objects are neither higher nor lower than specified by the specification,because inappropriate stresses applied would result in incorrect evaluation of performance on the test objects,more seriously,would cuase the damage of test objects with expensive cost losing.Generally,the process of operational tests is complicated and performed in a complex synthetic test circuit(hereafter as STC),where there are a lot of sensors used for measuring,monitoring and protection on line to ensure that the test circuit functions in good condition.Therefore,the measuring systems embedded play a core role in STC,acting like "eyes".Based on the first project of building up a STC in China,experience of planning measuring systems is summarized so as to be referenced by related engineers.展开更多
The IEEE Standard 1149.1 boundary scan (BS) implementation provides the internal access required for testing the digital printed circuit board (PCB). However, the integrity of the boundary scan test infrastructure sh...The IEEE Standard 1149.1 boundary scan (BS) implementation provides the internal access required for testing the digital printed circuit board (PCB). However, the integrity of the boundary scan test infrastructure should be tested first to guarantee the validation of the results of the rest functional test and diagnosis. This paper describes the fault models and test principles of the BS test access port (TAP) lines on PCBs. A test algorithm with high fault coverage and short time is then presented for the PCB on which all ICs are BS ones.展开更多
This paper presents an analytical method for electromagnetic acoustic transducers （EMATs） under voltage excitation and considers the non-uniform distribution of the biased magnetic field. A complete model of EMATs i...This paper presents an analytical method for electromagnetic acoustic transducers （EMATs） under voltage excitation and considers the non-uniform distribution of the biased magnetic field. A complete model of EMATs including the non-uniform biased magnetic field, a pulsed eddy current field and the acoustic field is built up. The pulsed voltage excitation is transformed to the frequency domain by fast Fourier transformation （FFT）. In terms of the time harmonic field equations of the EMAT system, the impedances of the coils under different frequencies are calculated according to the circuit-field coupling method and Poynting＇s theorem. Then the currents under different frequencies are calculated according to Ohm＇s law and the pulsed current excitation is obtained by inverse fast Fourier transformation （IFFT）. Lastly, the sequentially coupled finite element method （FEM） is used to calculate the Lorentz force in the EMATs under the current excitation. An actual EMAT with a two-layer two-bundle printed circuit board （PCB） coil, a rectangular permanent magnet and an aluminium specimen is analysed. The coil impedances and the pulsed current are calculated and compared with the experimental results. Their agreement verified the validity of the proposed method. Furthermore, the influences of lift-off distances and the non-uniform static magnetic field on the Lorentz force under pulsed voltage excitation are studied.展开更多
In this paper, to simulate the arc motion in an air circuit breaker （ACB）, a three- dimensional magneto-hydrodynamic （MHD） model is developed, considering the influence of ther- mal radiation, the change of physic...In this paper, to simulate the arc motion in an air circuit breaker （ACB）, a three- dimensional magneto-hydrodynamic （MHD） model is developed, considering the influence of ther- mal radiation, the change of physical parameters of arc plasma and the nonlinear characteristic of ferromagnetic material. The distributions of pressure, temperature, gas flow and current density of arc plasma in the arc region are calculated. The simulation results show some phenomena which discourage arc interruption, such as back commutation and arc burning at the back of the splitter plate. To verify the simulation model, the arc motion is studied experimentally. The influences of the material and position of the innermost barrier plate are analyzed mainly. It proved that the model developed in this paper can efficiently simulate the arc motion. The results indicate that the insulation barrier plate close to the top of the splitter plate is conducive to the arc splitting, which leads to the significant increase of the arc voltage, so it is better for arc interruption. The research can provide methods and references to the optimization of ACB design.展开更多
This paper presents an automated POCOFAN-POFRAME algorithm thatpartitions large combinational digital VLSI circuits for pseudo exhaustive testing. In thispaper, a simulation framework and partitioning technique are pr...This paper presents an automated POCOFAN-POFRAME algorithm thatpartitions large combinational digital VLSI circuits for pseudo exhaustive testing. In thispaper, a simulation framework and partitioning technique are presented to guide VLSIcircuits to work under with fewer test vectors in order to reduce testing time and todevelop VLSI circuit designs. This framework utilizes two methods of partitioningPrimary Output Cone Fanout Partitioning (POCOFAN) and POFRAME partitioning todetermine number of test vectors in the circuit. The key role of partitioning is to identifyreconvergent fanout branch pairs and the optimal value of primary input node N andfanout F partitioning using I-PIFAN algorithm. The number of reconvergent fanout andits locations are critical for testing of VLSI circuits and design for testability. Hence, theirselection is crucial in order to optimize system performance and reliability. In the presentwork, the design constraints of the partitioned circuit considered for optimizationincludes critical path delay and test time. POCOFAN-POFRAME algorithm uses theparameters with optimal values of circuits maximum primary input cone size (N) andminimum fan-out value (F) to determine the number of test vectors, number of partitionsand its locations. The ISCAS’85 benchmark circuits have been successfully partitioned,the test results of C499 shows 45% reduction in the test vectors and the experimentalresults are compared with other partitioning methods, our algorithm makes fewer testvectors.展开更多
Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic t...Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic test pattern generation (ATPG). In addition, ATPG needs to deal with new defects caused by process variation when IC is shrinking. To reduce the computation effort of ATPG, test generation could be started earlier at higher abstraction level, which is in line with top-down design methodology that has become more popular nowadays. In this research, we employ Chen’s high-level fault model in the high-level ATPG. Besides shorter ATPG time as shown in many previous works, our study showed that high-level ATPG also contributes to test compaction. This is because most of the high-level faults correlate with the gate-level collapsed faults especially at input/output of the modules in a circuit. The high-level ATPG prototype used in our work is mainly composed by constraint-driven test generation engine and fault simulation engine. Experimental result showed that more reduced/compact test set can be generated from the high-level ATPG.展开更多
This paper discusses the modeling design and accuracy analysis of a single stage steam centrifugal compressor for China′S first seawater desalinization plant, and gives a brief presentation on the closed loop vapou...This paper discusses the modeling design and accuracy analysis of a single stage steam centrifugal compressor for China′S first seawater desalinization plant, and gives a brief presentation on the closed loop vapour test platform designed and constructed for qualification of the compress or for performance and operational reliability, and results of tests run with the compressor. Both tests and actual operation show the modeling design is successful, and the compressor achieved and exceeded what was expected in performance. The seawater desalinization plant has run with excellent performance and reliability for several years for the national seawater desalinization demonstration program. This proves it is practical and practicable to develop and design China′s steam centrifugal compressors in series from air centrifugal compressors by maintaining equal specific volume ratio at both inlet and outlet of the compressor.展开更多
文摘With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz. The simulation and experimental results verify that the test circuit with a radial stub is better than that without. As an example, a C-band AlGaN/GaN HEMT microwave power device is tested with the designed circuit and fixture. With a 5.4GHz microwave input signal,the maximum gain is 8.75dB,and the maximum output power is 33.2dBm.
基金Project Supported by National Development and Reform Commission(No.[2006]2709)
文摘With the growth of capacity of high voltage direct current(HVDC) transmission lines,the ratings of thyristor valves,which are one of the most critical equipments,are getting higher and higher.Verification of performance of thyristor valves particularly designed for HVDC project plays an important role in the handover of products between the manufacturer and the client.Conventional test facilities based on philosophy of direct test cannot meet the requirements for modern thyristor valves.New test facilities with high ratings are necessarily built based on philosophy of synthetic test.Over the conventional direct test circuit,the later is an economical and feasible solution with less financial investment and higher test capability.However,the equivalency between the synthetic test and the direct test should be analyzed technically in order to make sure that the condition of verification test in a synthetic test circuit should satisfy the actual operation condition of thyristor valves existing in a real HVDC project,just as in a direct test circuit.Equivalency analysis is focused in this paper,covering the scope of thyristor valves' steady state,and transient state.On the basis of the results achieved,a synthetic test circuit of 6 500 A/50 kV for operational tests of thyristor valves used for up to UHVDC project has newly been set up and already put into service in Xi'an High Voltage Apparatus Research Institute Co.,Ltd.(XIHARI),China.Some of the results have been adopted also by a new national standard of China.
文摘With the principles of microwave circuits and semiconductor device physics,three kinds of microwave power device test circuits are designed and simulated,whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz.The simulated results verify that the test circuit with stepped-impedance filter bias network has a larger bandwidth than that with the radial stub.A microstrip interdigital capacitor is used in the third test circuit to replace the DC block,however,which does not show its advantage during the test frequency band.Based on the simulated results,the stepped-impedance filter test circuit can be used to evaluate microwave power devices in the whole C band,namely from 4 to 8GHz.
文摘We review the short-circuit testing of distribution and power transformers, and include a list of 110-220kV power transformers tested up to February 2002.
基金Supported by the Key Laboratory of Microsatellites,Chinese Academy of Sciences
文摘A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130？nm CMOS bulk Si and silicon-on-insulator （SOI） technologies. The effectiveness of linear energy transfer （LET） with a tilted ion beam at the 130？nm technology node is obtained. Tests of tilted angles θ=0 ° , 30 ° and 60 ° with respect to the normal direction are performed under heavy-ion Kr with certain power whose LET is about 40？MeVcm 2 /mg at normal incidence. Error numbers in D flip-flop chains are used to determine their upset sensitivity at different incidence angles. It is indicated that the effective LETs for SOI and bulk Si are not exactly in inverse proportion to cosθ , furthermore the effective LET for SOI is more closely in inverse proportion to cosθ compared to bulk Si, which are also the well known behavior. It is interesting that, if we design the sample in the dual interlocked storage cell approach, the effective LET in bulk Si will look like inversely proportional to cosθ very well, which is also specifically explained.
基金supported by the Knowledge Innovation Program of the Chinese Academy of Sciences(KJCX2-YW-N27)the CAS Center for Excellence in Particle Physics(CCEPP)
文摘The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.
文摘An important means for digital circuit analysis, design. maintenance and production is the IC chip test and analysis. With digital circuit application prevailing today, the automatic test and analysis of digital circuits is going to play a more important role. It can save a great deal of time and cost for the maintenance of equipment and can also provide correst analytical data for designers.
文摘In the Paper,the author introduces an embedded design verification test based on specific chips to solve the technical problems of microwave circuit test and fault diagnosis.The author explains embedded design of microwave circuit modules and approach of hardware design and software design,and finally verifies the embedded design of microwave circuit modules based on specific chips.
基金supported by SGCC Scientific and Technological Project(52110116004W)
文摘Firstly, relevant stress properties of millisecond level breaking process and microsecond level commutation process of hybrid HVDC circuit breaker are studied in detail on the basis of the analysis for the application environment and topological structure and operating principles of hybrid circuit breakers, and key stress parameters in transient state process of two time dimensions are extracted. The established digital simulation circuit for PSCAD/EMTDC device-level operation of the circuit breaker has verified the stress properties of millisecond level breaking process and microsecond level commutation process. Then, equivalent test method, circuits and parameters based on LC power supply are proposed on the basis of stress extraction. Finally, the results of implemented breaking tests for complete 200 kV circuit breaker, 100 kV and 50 kV circuit breaker units, as well as single power electronic module have verified the accuracy of the simulation circuit and mathematical analysis. The result of this paper can be a guide to electrical structure and test system design of hybrid HVDC circuit breaker.
文摘Based on the recommendation of ICTD＇09 TPC members, this Special Issue of the Journal of Electronic Science ＆ Technology of China （JESTC） contained 22 high quality papers selected from the Proceedings of 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis （ICTD ＇09） which is fully sponsored by the IEEE Circuits and Systems Society （CASS）, and is technically co-sponsored by the University of Electronic Science and Technology of China （UESTC）, the Chinese Institute of Electronics （CIE）, the China Instrument ＆ Control Society （CIS）, and organized by UESTC.
基金Project Supported by National Development and Reform Commission(No.[2006]2709)
文摘Thyristor valve is one of the key equipments for ultra high voltage direct current(UHVDC) power transmission projects.Before being installed on site,they need to be tested in a laboratory in order to verify their operational performance to satisfy the technical specification of project related.Test facilities for operational tests of thyristor valves are supposed to enable to undertake more severe electrical stresses than those being applied in the thyristor valves under test(test objects).On the other hand,the stresses applied into the test objects are neither higher nor lower than specified by the specification,because inappropriate stresses applied would result in incorrect evaluation of performance on the test objects,more seriously,would cuase the damage of test objects with expensive cost losing.Generally,the process of operational tests is complicated and performed in a complex synthetic test circuit(hereafter as STC),where there are a lot of sensors used for measuring,monitoring and protection on line to ensure that the test circuit functions in good condition.Therefore,the measuring systems embedded play a core role in STC,acting like "eyes".Based on the first project of building up a STC in China,experience of planning measuring systems is summarized so as to be referenced by related engineers.
文摘The IEEE Standard 1149.1 boundary scan (BS) implementation provides the internal access required for testing the digital printed circuit board (PCB). However, the integrity of the boundary scan test infrastructure should be tested first to guarantee the validation of the results of the rest functional test and diagnosis. This paper describes the fault models and test principles of the BS test access port (TAP) lines on PCBs. A test algorithm with high fault coverage and short time is then presented for the PCB on which all ICs are BS ones.
基金Project supported by the National Natural Science Foundation of China (Grant No. 10974115)
文摘This paper presents an analytical method for electromagnetic acoustic transducers （EMATs） under voltage excitation and considers the non-uniform distribution of the biased magnetic field. A complete model of EMATs including the non-uniform biased magnetic field, a pulsed eddy current field and the acoustic field is built up. The pulsed voltage excitation is transformed to the frequency domain by fast Fourier transformation （FFT）. In terms of the time harmonic field equations of the EMAT system, the impedances of the coils under different frequencies are calculated according to the circuit-field coupling method and Poynting＇s theorem. Then the currents under different frequencies are calculated according to Ohm＇s law and the pulsed current excitation is obtained by inverse fast Fourier transformation （IFFT）. Lastly, the sequentially coupled finite element method （FEM） is used to calculate the Lorentz force in the EMATs under the current excitation. An actual EMAT with a two-layer two-bundle printed circuit board （PCB） coil, a rectangular permanent magnet and an aluminium specimen is analysed. The coil impedances and the pulsed current are calculated and compared with the experimental results. Their agreement verified the validity of the proposed method. Furthermore, the influences of lift-off distances and the non-uniform static magnetic field on the Lorentz force under pulsed voltage excitation are studied.
基金supported by National Key Basic Research Program of China (973 Program) (Nos.2015CB251002,6132620303)National Natural Science Foundation of China (Nos.51221005,51377128,51577144)the Fundamental Research Funds for the Central Universities,China
文摘In this paper, to simulate the arc motion in an air circuit breaker （ACB）, a three- dimensional magneto-hydrodynamic （MHD） model is developed, considering the influence of ther- mal radiation, the change of physical parameters of arc plasma and the nonlinear characteristic of ferromagnetic material. The distributions of pressure, temperature, gas flow and current density of arc plasma in the arc region are calculated. The simulation results show some phenomena which discourage arc interruption, such as back commutation and arc burning at the back of the splitter plate. To verify the simulation model, the arc motion is studied experimentally. The influences of the material and position of the innermost barrier plate are analyzed mainly. It proved that the model developed in this paper can efficiently simulate the arc motion. The results indicate that the insulation barrier plate close to the top of the splitter plate is conducive to the arc splitting, which leads to the significant increase of the arc voltage, so it is better for arc interruption. The research can provide methods and references to the optimization of ACB design.
文摘This paper presents an automated POCOFAN-POFRAME algorithm thatpartitions large combinational digital VLSI circuits for pseudo exhaustive testing. In thispaper, a simulation framework and partitioning technique are presented to guide VLSIcircuits to work under with fewer test vectors in order to reduce testing time and todevelop VLSI circuit designs. This framework utilizes two methods of partitioningPrimary Output Cone Fanout Partitioning (POCOFAN) and POFRAME partitioning todetermine number of test vectors in the circuit. The key role of partitioning is to identifyreconvergent fanout branch pairs and the optimal value of primary input node N andfanout F partitioning using I-PIFAN algorithm. The number of reconvergent fanout andits locations are critical for testing of VLSI circuits and design for testability. Hence, theirselection is crucial in order to optimize system performance and reliability. In the presentwork, the design constraints of the partitioned circuit considered for optimizationincludes critical path delay and test time. POCOFAN-POFRAME algorithm uses theparameters with optimal values of circuits maximum primary input cone size (N) andminimum fan-out value (F) to determine the number of test vectors, number of partitionsand its locations. The ISCAS’85 benchmark circuits have been successfully partitioned,the test results of C499 shows 45% reduction in the test vectors and the experimentalresults are compared with other partitioning methods, our algorithm makes fewer testvectors.
文摘Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic test pattern generation (ATPG). In addition, ATPG needs to deal with new defects caused by process variation when IC is shrinking. To reduce the computation effort of ATPG, test generation could be started earlier at higher abstraction level, which is in line with top-down design methodology that has become more popular nowadays. In this research, we employ Chen’s high-level fault model in the high-level ATPG. Besides shorter ATPG time as shown in many previous works, our study showed that high-level ATPG also contributes to test compaction. This is because most of the high-level faults correlate with the gate-level collapsed faults especially at input/output of the modules in a circuit. The high-level ATPG prototype used in our work is mainly composed by constraint-driven test generation engine and fault simulation engine. Experimental result showed that more reduced/compact test set can be generated from the high-level ATPG.
文摘This paper discusses the modeling design and accuracy analysis of a single stage steam centrifugal compressor for China′S first seawater desalinization plant, and gives a brief presentation on the closed loop vapour test platform designed and constructed for qualification of the compress or for performance and operational reliability, and results of tests run with the compressor. Both tests and actual operation show the modeling design is successful, and the compressor achieved and exceeded what was expected in performance. The seawater desalinization plant has run with excellent performance and reliability for several years for the national seawater desalinization demonstration program. This proves it is practical and practicable to develop and design China′s steam centrifugal compressors in series from air centrifugal compressors by maintaining equal specific volume ratio at both inlet and outlet of the compressor.
