This paper addresses sequential synchronization for first-order affine systems in the presence of bounded disturbances.We develop a reinforcement learning(RL)based controller that combines an anisotropic weighted powe...This paper addresses sequential synchronization for first-order affine systems in the presence of bounded disturbances.We develop a reinforcement learning(RL)based controller that combines an anisotropic weighted power-sign baseline with a projected residual actor-critic.The baseline uses a diagonal weighting to shape the direction field of a transformed error and thereby encode the desired convergence order across state channels.A lightweight projection comprising a norm cap and a half-space alignment with the descent direction filters the residual policy so as to preserve the baseline Lyapunov decrease.We establish fixed-time stability and sequential convergence for the baseline via a composite Lyapunov argument,and prove that the RL residual maintains these properties under the projection.A spacecraft translational tracking case study with bounded sinusoidal disturbances validates the design:the position states converge in the prescribed order,the residual actions remain consistently bounded with respect to the baseline control magnitude and direction,and learning signals stabilize.Quantitatively,axis-wise first-hit times,control energy,and peak control corroborate the theoretical guarantees while illustrating performance benefits of the residual layer.展开更多
The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms...The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms a graph to represent the static data-flow for the target circuit. A fault-model is defined at RT-Level. The ATPG method is then presented. Experimental results show that the ATPG method is time effective and can generate tests with fairly good quality, the fault coverage of some circuits is to be enhanced though.展开更多
基金supported by the China Postdoctoral Science Foundation(No.2024M762602).
文摘This paper addresses sequential synchronization for first-order affine systems in the presence of bounded disturbances.We develop a reinforcement learning(RL)based controller that combines an anisotropic weighted power-sign baseline with a projected residual actor-critic.The baseline uses a diagonal weighting to shape the direction field of a transformed error and thereby encode the desired convergence order across state channels.A lightweight projection comprising a norm cap and a half-space alignment with the descent direction filters the residual policy so as to preserve the baseline Lyapunov decrease.We establish fixed-time stability and sequential convergence for the baseline via a composite Lyapunov argument,and prove that the RL residual maintains these properties under the projection.A spacecraft translational tracking case study with bounded sinusoidal disturbances validates the design:the position states converge in the prescribed order,the residual actions remain consistently bounded with respect to the baseline control magnitude and direction,and learning signals stabilize.Quantitatively,axis-wise first-hit times,control energy,and peak control corroborate the theoretical guarantees while illustrating performance benefits of the residual layer.
基金supported by National Natural Science Foundation of China under grant No.69733010.
文摘The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms a graph to represent the static data-flow for the target circuit. A fault-model is defined at RT-Level. The ATPG method is then presented. Experimental results show that the ATPG method is time effective and can generate tests with fairly good quality, the fault coverage of some circuits is to be enhanced though.
