A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distri...A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distribution obtained through approximating the input output function of the SI circuit by conventional wavelet collocation method.In practical applications,the proposed method is a general purpose approach,by which both the small signal effect and the large signal effect are modeled in a unified formulation to ease the process of modeling and simulation.Compared with the published modeling approaches,the proposed nonlinear auto companding method works more efficiently not only in controlling the error distribution but also in reducing the modeling errors.To demonstrate the promising features of the proposed method,several SI circuits are employed as examples to be modeled and simulated.展开更多
In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propo...In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propose a method of selecting the sample set of the basic classifier by roulette method and realizing fault diagnosis by using SVM-AdaBoost.The experimental results show that the proportion of basic classifier samples affects classification accuracy,which reaches the highest when the proportion is 85%.When selecting the sample set of basic classifier by roulette method,the fault diagnosis accuracy is generally higher than that of the maximum weight priority method.When the optimal proportion 85%is taken,the accuracy is highest up to 96.3%.More importantly,this way can better adapt to the critical data and improve the anti-interference ability of the algorithm,and therefore it provides a basis for fault diagnosis of ACIS.展开更多
Circuits with switched current are described by an admittance matrix and seeking current transfers then means calculating the ratio of algebraic supplements of this matrix. As there are also graph methods of circuit a...Circuits with switched current are described by an admittance matrix and seeking current transfers then means calculating the ratio of algebraic supplements of this matrix. As there are also graph methods of circuit analysis in addition to algebraic methods, it is clearly possible in theory to carry out an analysis of the whole switched circuit in two-phase switching exclusively by the graph method as well. For this purpose it is possible to plot a Mason graph of a circuit, use transformation graphs to reduce Mason graphs for all the four phases of switching, and then plot a summary graph from the transformed graphs obtained this way. First the author draws nodes and possible branches, obtained by transformation graphs for transfers of EE （even-even） and OO （odd-odd） phases. In the next step, branches obtained by transformation graphs for EO and OE phase are drawn between these nodes, while their resulting transfer is 1 multiplied by z^1/2. This summary graph is extended by two branches from input node and to output node, the extended graph can then be interpreted by the Mason＇s relation to provide transparent current transfers. Therefore it is not necessary to compose a sum admittance matrix and to express this consequently in numbers, and so it is possible to reach the final result in a graphical way.展开更多
By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is su...By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.展开更多
Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch（CRS）-based stateful log...Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch（CRS）-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits.展开更多
A crowbar impulse current circuit for testing the switch-type surge protective device （SPD） is presented. The crowbar circuit consists of a computer control circuit, a trigger voltage pulse generator, a main dischar...A crowbar impulse current circuit for testing the switch-type surge protective device （SPD） is presented. The crowbar circuit consists of a computer control circuit, a trigger voltage pulse generator, a main discharging switch, and a crowbar pseudospark switch. The active trigger technology was studied in the crowbar impulse current circuit. The circuit monitors the main discharging current and generates a trigger signal at a proper time for the crowbar pseudospark switch operation. The trigger characteristics of the main discharge switch and the crowbar pseu- dospark switch were investigated. By monitoring the preset applied capacitor voltage, the gap distance of the main discharging switch could be adjusted to ensure a discharging delay time less than 2 μs. Equipped with a surface ttashover trigger device made of high relative perimittivity dielectric material BaTiO3 （εr = 3460）, the discharge delay time of the crowbar pseudospark switch is less than 85 ns, and the minimum operating voltage is less than 1% of its self-breakdown voltage. With a storage capacitor of 9 μF , an inductor of 18 μH and a crowbar pseudospark switch, a load of 30 mΩ and an applied capacitor voltage of 40 kV, an impulse current waveform of maximum 25 kA was generated with a rise time and time to half peak value of 17.2 μs and 336μs respectively.展开更多
This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V proces...This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.展开更多
A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effect...A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effective and practical use of the circuits. A way to generate ternary complementary and dual circuits by applying the complementarity and duality principles is presented. This new static ternary double pass-transistor logic scheme has some favorable properties：the use of standard CMOS process without any modification of the thresholds, a perfectly symmetrical structure,a full logic swing, the maximum possible noise margins, a less complex structure, and no static power consumption. HSPICE simulations using TSMC 0.25μm CMOS technology and a 3V power supply demonstrate the effectiveness of the proposed design.展开更多
文摘A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distribution obtained through approximating the input output function of the SI circuit by conventional wavelet collocation method.In practical applications,the proposed method is a general purpose approach,by which both the small signal effect and the large signal effect are modeled in a unified formulation to ease the process of modeling and simulation.Compared with the published modeling approaches,the proposed nonlinear auto companding method works more efficiently not only in controlling the error distribution but also in reducing the modeling errors.To demonstrate the promising features of the proposed method,several SI circuits are employed as examples to be modeled and simulated.
基金Natural Science Foundation of Gansu Province(Nos.18JR3RA130,2018C-11,2018A-022)Science Fund of Lanzhou Jiaotong University(No.2017022)。
文摘In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propose a method of selecting the sample set of the basic classifier by roulette method and realizing fault diagnosis by using SVM-AdaBoost.The experimental results show that the proportion of basic classifier samples affects classification accuracy,which reaches the highest when the proportion is 85%.When selecting the sample set of basic classifier by roulette method,the fault diagnosis accuracy is generally higher than that of the maximum weight priority method.When the optimal proportion 85%is taken,the accuracy is highest up to 96.3%.More importantly,this way can better adapt to the critical data and improve the anti-interference ability of the algorithm,and therefore it provides a basis for fault diagnosis of ACIS.
文摘Circuits with switched current are described by an admittance matrix and seeking current transfers then means calculating the ratio of algebraic supplements of this matrix. As there are also graph methods of circuit analysis in addition to algebraic methods, it is clearly possible in theory to carry out an analysis of the whole switched circuit in two-phase switching exclusively by the graph method as well. For this purpose it is possible to plot a Mason graph of a circuit, use transformation graphs to reduce Mason graphs for all the four phases of switching, and then plot a summary graph from the transformed graphs obtained this way. First the author draws nodes and possible branches, obtained by transformation graphs for transfers of EE （even-even） and OO （odd-odd） phases. In the next step, branches obtained by transformation graphs for EO and OE phase are drawn between these nodes, while their resulting transfer is 1 multiplied by z^1/2. This summary graph is extended by two branches from input node and to output node, the extended graph can then be interpreted by the Mason＇s relation to provide transparent current transfers. Therefore it is not necessary to compose a sum admittance matrix and to express this consequently in numbers, and so it is possible to reach the final result in a graphical way.
基金Supported by National Natural Science Foundation of China
文摘By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61374150 and 11271146)the State Key Program of the National Natural Science Foundation of China(Grant No.61134012)+1 种基金the Doctoral Fund of Ministry of Education of China(Grant No.20130142130012)the Science and Technology Program of Shenzhen City,China(Grant No.JCYJ20140509162710496)
文摘Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch（CRS）-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits.
文摘A crowbar impulse current circuit for testing the switch-type surge protective device （SPD） is presented. The crowbar circuit consists of a computer control circuit, a trigger voltage pulse generator, a main discharging switch, and a crowbar pseudospark switch. The active trigger technology was studied in the crowbar impulse current circuit. The circuit monitors the main discharging current and generates a trigger signal at a proper time for the crowbar pseudospark switch operation. The trigger characteristics of the main discharge switch and the crowbar pseu- dospark switch were investigated. By monitoring the preset applied capacitor voltage, the gap distance of the main discharging switch could be adjusted to ensure a discharging delay time less than 2 μs. Equipped with a surface ttashover trigger device made of high relative perimittivity dielectric material BaTiO3 （εr = 3460）, the discharge delay time of the crowbar pseudospark switch is less than 85 ns, and the minimum operating voltage is less than 1% of its self-breakdown voltage. With a storage capacitor of 9 μF , an inductor of 18 μH and a crowbar pseudospark switch, a load of 30 mΩ and an applied capacitor voltage of 40 kV, an impulse current waveform of maximum 25 kA was generated with a rise time and time to half peak value of 17.2 μs and 336μs respectively.
文摘This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.
文摘A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effective and practical use of the circuits. A way to generate ternary complementary and dual circuits by applying the complementarity and duality principles is presented. This new static ternary double pass-transistor logic scheme has some favorable properties：the use of standard CMOS process without any modification of the thresholds, a perfectly symmetrical structure,a full logic swing, the maximum possible noise margins, a less complex structure, and no static power consumption. HSPICE simulations using TSMC 0.25μm CMOS technology and a 3V power supply demonstrate the effectiveness of the proposed design.
