Objective To explore three-dimensional relations of pedicle screw channel (PSC) ,screw entry point and lateral surface of cervical vertebral body by digital techniques. Methods CT scan images of cervical
This paper describes the short channel theory of the bipolar field-effect transistor （BiFET） by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole em...This paper describes the short channel theory of the bipolar field-effect transistor （BiFET） by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.展开更多
This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper whic...This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.展开更多
The bipolar theory of field-effect transistor is introduced to replace the 55-year-old classic unipolar theory invented by Shockley in 1952 in order to account for the characteristics observed in recent double-gate na...The bipolar theory of field-effect transistor is introduced to replace the 55-year-old classic unipolar theory invented by Shockley in 1952 in order to account for the characteristics observed in recent double-gate nanometer silicon MOS field-effect transistors. Two electron and two hole surface channels are simultaneously present in all channel current ranges. Output and transfer characteristics are computed over practical base and gate oxide thicknesses. The bipolar theory corroborates well with experimental data reported recently for FinFETs with metal/silicon and p/n junction source/drain contacts. Single-device realization of CMOS inverter and SRAM memory circuit functions are recognized.展开更多
This paper describes the bipolar field-effect transistor （BiFET） and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis ...This paper describes the bipolar field-effect transistor （BiFET） and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical （quasi-Fermi） potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.展开更多
The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transvers...The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.展开更多
A high-side thin-layer silicon-on-insulator （SOI） pLDMOS is proposed, adopting field implant （FI） and multiple field plate （MFP） technologies. The breakdown mechanisms of back gate （BG） turn-on, surface channe...A high-side thin-layer silicon-on-insulator （SOI） pLDMOS is proposed, adopting field implant （FI） and multiple field plate （MFP） technologies. The breakdown mechanisms of back gate （BG） turn-on, surface channel punch-through, and vertical and lateral avalanche breakdown are investigated by setting up analytical models, simulating related parameters and verifying experimentally. The device structure is optimized based on the above research. The shallow junction achieved through FI technology attenuates the BG effect, the optimized channel length eliminates the surface channel punch-through, the advised thickness of the buried oxide dispels the vertical avalanche breakdown, and the MFP technology avoids premature lateral avalanche breakdown by modulating the electric field distribution. Finally, for the first time, a 300 V high-side pLDMOS is experimentally realized on a 1.5 μm thick thin-layer SOI.展开更多
Friction stir welding [FSW） has achieved remarkable success in the joining and processing of aluminium alloys and other softer structural alloys. Conventional FSW, however, has not been entirely successful in the joi...Friction stir welding [FSW） has achieved remarkable success in the joining and processing of aluminium alloys and other softer structural alloys. Conventional FSW, however, has not been entirely successful in the joining, processing and manufacturing of different desired materials essential to meet the sophis- ticated green globe requirements. Through the efforts of improving the process and transferring the existing friction stir knowledge base to other advanced applications, several friction stir based daughter technologies have emerged over the timeline, A few among these technologies are well developed while others are under the process of emergence. Beginning with a broad classification of the scattered fric- tions stir based technologies into two categories, welding and processing, it appears now time to know, compile and review these to enable their rapid access for reference and academia. In this review article, the friction stir based technologies classified under the categol^J of welding are those applied for join- ing of materials while the remnant are labeled as friction stir processing （FSP） technologies. This review article presents an overview of four general aspects of both the developed and the developing friction stir based technologies, their associated process parameters, metallurgical features of their products and their feasibility and application to various materials. The lesser known and emerging technologies have been emphasized.展开更多
This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Eff...This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Effect Transistor （BiFET） of nanometer dimensions. The electrical characteristics are numerically obtained by solving the five partial dif- ferential equations for the transistor structure of two MOS-gates on the two surfaces of a thin pure silicon base layer with electron and hole contacts on both ends of the thin base. Internal and CMOS boundary conditions are used on the three potentials （electrostatic and electron and hole electrochemical potentials）. Families of curves are rapidly computed using a dual-processor personal computer running the 64-bit FORTRAN on the Windows XP operating system.展开更多
This paper reports the physical realization of the Bipolar Field-Effect Transistor （BiFET） and its onetransistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pur...This paper reports the physical realization of the Bipolar Field-Effect Transistor （BiFET） and its onetransistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor （the bulk transistor） and the impurethin-base Silicon-on-Insulator （SOI） transistor and the two-MOS-gates on thin base transistors （the FinFET and the Thin Film Transistor TFF）. Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.展开更多
文摘Objective To explore three-dimensional relations of pedicle screw channel (PSC) ,screw entry point and lateral surface of cervical vertebral body by digital techniques. Methods CT scan images of cervical
文摘This paper describes the short channel theory of the bipolar field-effect transistor （BiFET） by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.
文摘This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.
文摘The bipolar theory of field-effect transistor is introduced to replace the 55-year-old classic unipolar theory invented by Shockley in 1952 in order to account for the characteristics observed in recent double-gate nanometer silicon MOS field-effect transistors. Two electron and two hole surface channels are simultaneously present in all channel current ranges. Output and transfer characteristics are computed over practical base and gate oxide thicknesses. The bipolar theory corroborates well with experimental data reported recently for FinFETs with metal/silicon and p/n junction source/drain contacts. Single-device realization of CMOS inverter and SRAM memory circuit functions are recognized.
文摘This paper describes the bipolar field-effect transistor （BiFET） and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical （quasi-Fermi） potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.
文摘The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.
基金Project supported by National Natural Science Foundation of China(Grant No.60906038)
文摘A high-side thin-layer silicon-on-insulator （SOI） pLDMOS is proposed, adopting field implant （FI） and multiple field plate （MFP） technologies. The breakdown mechanisms of back gate （BG） turn-on, surface channel punch-through, and vertical and lateral avalanche breakdown are investigated by setting up analytical models, simulating related parameters and verifying experimentally. The device structure is optimized based on the above research. The shallow junction achieved through FI technology attenuates the BG effect, the optimized channel length eliminates the surface channel punch-through, the advised thickness of the buried oxide dispels the vertical avalanche breakdown, and the MFP technology avoids premature lateral avalanche breakdown by modulating the electric field distribution. Finally, for the first time, a 300 V high-side pLDMOS is experimentally realized on a 1.5 μm thick thin-layer SOI.
基金financial support on this work from the National Natural Science Foundation of China(Grant Nos.51475272 and 51550110501)Shandong University for the Postdoctoral fellowship
文摘Friction stir welding [FSW） has achieved remarkable success in the joining and processing of aluminium alloys and other softer structural alloys. Conventional FSW, however, has not been entirely successful in the joining, processing and manufacturing of different desired materials essential to meet the sophis- ticated green globe requirements. Through the efforts of improving the process and transferring the existing friction stir knowledge base to other advanced applications, several friction stir based daughter technologies have emerged over the timeline, A few among these technologies are well developed while others are under the process of emergence. Beginning with a broad classification of the scattered fric- tions stir based technologies into two categories, welding and processing, it appears now time to know, compile and review these to enable their rapid access for reference and academia. In this review article, the friction stir based technologies classified under the categol^J of welding are those applied for join- ing of materials while the remnant are labeled as friction stir processing （FSP） technologies. This review article presents an overview of four general aspects of both the developed and the developing friction stir based technologies, their associated process parameters, metallurgical features of their products and their feasibility and application to various materials. The lesser known and emerging technologies have been emphasized.
文摘This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon （CMOS） voltage-inverter circuit using one physical Bipolar Field-Effect Transistor （BiFET） of nanometer dimensions. The electrical characteristics are numerically obtained by solving the five partial dif- ferential equations for the transistor structure of two MOS-gates on the two surfaces of a thin pure silicon base layer with electron and hole contacts on both ends of the thin base. Internal and CMOS boundary conditions are used on the three potentials （electrostatic and electron and hole electrochemical potentials）. Families of curves are rapidly computed using a dual-processor personal computer running the 64-bit FORTRAN on the Windows XP operating system.
基金This investigation and Jie Binbin have been supported by the CTSAH Associates (CTSA)founded by the late Linda Su-Nan Chang Sah,in memory of her 70th year.
文摘This paper reports the physical realization of the Bipolar Field-Effect Transistor （BiFET） and its onetransistor basic building block circuits. Examples are given for the one and two MOS gates on thin and thick, pure and impure base, with electron and hole contacts, and the corresponding theoretical current-voltage characteristics previously computed by us, without generation-recombination-trapping-tunneling of electrons and holes. These examples include the one-MOS-gate on semi-infinite thick impure base transistor （the bulk transistor） and the impurethin-base Silicon-on-Insulator （SOI） transistor and the two-MOS-gates on thin base transistors （the FinFET and the Thin Film Transistor TFF）. Figures are given with the cross-section views containing the electron and hole concentration and current density distributions and trajectories and the corresponding DC current-voltage characteristics.
