High-resistivity silicon-on-insulator （HR-SOI） and trap-rich high-resistivity silicon-on-insulator （TR-S01） sub- strates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss a...High-resistivity silicon-on-insulator （HR-SOI） and trap-rich high-resistivity silicon-on-insulator （TR-S01） sub- strates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss and non- linearity characteristics are measured from coplanar waveguide （CPW） t lines fabricated on HR-SOI and TR-SOI substrates. The patterned insulator structure is introduced to reduce loss and non-linearity char- acteristics. A metal-oxide-semiconductor （MOS） CPW circuit model is established to expound the mechanism of reducing the parasitic surface conductance （PSC） effect by combining the semiconductor characteristic anal- ysis （pseudo-MOS and C-V test）. The rf performance of the CPW transmission lines under dc bias supply is also compared. The TR-SOI substrate with the patterned oxide structure sample has the minimum rf loss （〈0.2 dB/mm up to 10 GHz）, the best non-linearity performance, and reductions of 4 dB and 10 dB are compared with the state-of-the-art TR-SOI sample＇s, HD2 and HD3, respectively. It shows the potential application for integrating the two schemes to further suppress the PSC effect.展开更多
Frequency-selective surface （FSS） is a two-dimensional periodic structure consisting of a dielectric substrate and the metal units （or apertures） arranged periodically on it. When manufacturing the substrate, its ...Frequency-selective surface （FSS） is a two-dimensional periodic structure consisting of a dielectric substrate and the metal units （or apertures） arranged periodically on it. When manufacturing the substrate, its thickness and dielectric constant suffer process tolerances. This may induce the center frequency of the FSS to shift, and consequently influence its characteristics. In this paper, a bandpass FSS structure is designed. The units are the Jerusalem crosses arranged squarely. The mode-matching technique is used for simulation. The influence of the tolerances of the substrate＇s thickness and dielectric constant on the center frequency is analyzed. Results show that the tolerances of thickness and dielectric constant have different influences on the center frequency of the FSS. It is necessary to ensure the process tolerance of the dielectric constant in the design and manufacturing of the substrate in order to stabilize the center frequency.展开更多
An improved single-π equivalent circuit model for on-chip inductors in the GaAs process is presented in this paper. Considering high order parasites, the model is established by comprising an improved skin effect bra...An improved single-π equivalent circuit model for on-chip inductors in the GaAs process is presented in this paper. Considering high order parasites, the model is established by comprising an improved skin effect branch and a substrate lateral coupling branch. The parameter extraction is based on an improved characteristic function approach and vector fitting method. The model has better simulation than the previous work over the measured data of 2.5r and 4.5r on-chip inductors in the GaAs process.展开更多
文摘High-resistivity silicon-on-insulator （HR-SOI） and trap-rich high-resistivity silicon-on-insulator （TR-S01） sub- strates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss and non- linearity characteristics are measured from coplanar waveguide （CPW） t lines fabricated on HR-SOI and TR-SOI substrates. The patterned insulator structure is introduced to reduce loss and non-linearity char- acteristics. A metal-oxide-semiconductor （MOS） CPW circuit model is established to expound the mechanism of reducing the parasitic surface conductance （PSC） effect by combining the semiconductor characteristic anal- ysis （pseudo-MOS and C-V test）. The rf performance of the CPW transmission lines under dc bias supply is also compared. The TR-SOI substrate with the patterned oxide structure sample has the minimum rf loss （〈0.2 dB/mm up to 10 GHz）, the best non-linearity performance, and reductions of 4 dB and 10 dB are compared with the state-of-the-art TR-SOI sample＇s, HD2 and HD3, respectively. It shows the potential application for integrating the two schemes to further suppress the PSC effect.
文摘Frequency-selective surface （FSS） is a two-dimensional periodic structure consisting of a dielectric substrate and the metal units （or apertures） arranged periodically on it. When manufacturing the substrate, its thickness and dielectric constant suffer process tolerances. This may induce the center frequency of the FSS to shift, and consequently influence its characteristics. In this paper, a bandpass FSS structure is designed. The units are the Jerusalem crosses arranged squarely. The mode-matching technique is used for simulation. The influence of the tolerances of the substrate＇s thickness and dielectric constant on the center frequency is analyzed. Results show that the tolerances of thickness and dielectric constant have different influences on the center frequency of the FSS. It is necessary to ensure the process tolerance of the dielectric constant in the design and manufacturing of the substrate in order to stabilize the center frequency.
基金Project supported by the National Natural Science Foundation of China(No.61674036)
文摘An improved single-π equivalent circuit model for on-chip inductors in the GaAs process is presented in this paper. Considering high order parasites, the model is established by comprising an improved skin effect branch and a substrate lateral coupling branch. The parameter extraction is based on an improved characteristic function approach and vector fitting method. The model has better simulation than the previous work over the measured data of 2.5r and 4.5r on-chip inductors in the GaAs process.
