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A Novel Sub-50nm Poly-Si Gate Patterning Technology
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作者 张盛东 韩汝琦 +3 位作者 刘晓彦 关旭东 李婷 张大成 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2001年第5期565-568,共4页
A novel low-cost sub-50nm poly-Si gate patterning technology is proposed and experimentally demonstrated.The technology is resolution-independent,ie.,it does not contain any critical photolithographic steps.The nano-s... A novel low-cost sub-50nm poly-Si gate patterning technology is proposed and experimentally demonstrated.The technology is resolution-independent,ie.,it does not contain any critical photolithographic steps.The nano-scale masking pattern for gate formation is formed according to the image transfer of an edge-defined spacer.Experimental results reveal that the resultant gate length,about 75 to 85 percent of the thickness,is determined by the thickness of the film to form the spacer.From SEM photograph,the cross-section of the poly-Si gate is seen to be an inverted-trapezoid,which is useful to reduce the gate resistance. 展开更多
关键词 poly-Si gate sub-50nm image transfer LITHOGRAPHY
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