Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi...Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.展开更多
The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories（MRAMs） with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor（CMOS） process respectively and different magnetic tunneling j...The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories（MRAMs） with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor（CMOS） process respectively and different magnetic tunneling junctions（MTJs） are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad（Si） in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13-μm process circuit exhibits better radiation tolerance than the 0.18-μm process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.展开更多
To test the magnetic signals leaked from the surface of specimens during loading, the experiments of the static tensile of medium carbon 45# steel were carried out. The results show that the magnetic field strength va...To test the magnetic signals leaked from the surface of specimens during loading, the experiments of the static tensile of medium carbon 45# steel were carried out. The results show that the magnetic field strength values rapidly vary when the load began, and the curves of the magnetic field strength change from irregularity to regularity with the increase of the load. Furthermore, by comparing with the state of on-line testing, it is found that the magnetic signals of out-of-line testing has more practicability. In the course of loading, though the dots of passing zero of the magnetic field strength continually changed their positions and quantities, the last rupture places were always approached by the dots of passing zero since the elastic loading phase. Some certain relations should exist between external stress and changing of magnetic signals inside the material, and correlative explanation is made based on dislocation theory and the mechanism of magnetic domain action, which provides the basis for further research of magnetic memory.展开更多
Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flu...Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed.展开更多
Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiat...Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell＇s static noise margin （SNM） and the background data, and study the influence of irradiation on the probability density function of ASNM, which is the difference between two data sides＇ SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation （STI） oxide rather than from the gate oxide of the micron-device.展开更多
With the progress of the semiconductor industry,the resistive random-access memory（RAM） has drawn increasing attention.The discovery of the memristor has brought much attention to this study.Research has focused on ...With the progress of the semiconductor industry,the resistive random-access memory（RAM） has drawn increasing attention.The discovery of the memristor has brought much attention to this study.Research has focused on the resistive switching characteristics of different materials and the analysis of resistive switching mechanisms.We discuss the resistive switching mechanisms of different materials in this paper and analyze the differences of those mechanisms from the view point of circuitry to establish their respective circuit models.Finally,simulations are presented.We give the prospect of using different materials in resistive RAM on account of their resistive switching mechanisms,which are applied to explain their resistive switchings.展开更多
As artificial intelligence and big data become increasingly prevalent, resistive random-access memory (RRAM) has become one of the most promising alternatives for storing massive amounts of data. In this study, we emp...As artificial intelligence and big data become increasingly prevalent, resistive random-access memory (RRAM) has become one of the most promising alternatives for storing massive amounts of data. In this study, we employed high-quality crystalline TiN/Al_(2)O_(3)/BaTiO_(3)/Pt RRAM with an optimized thin Al_(2)O_(3) interlayer around 12 nm thick prepared using atomic layer deposition since the thickness of the interlayer affects the memory window size. After insertion of the Al_(2)O_(3) interlayer, the novel RRAM exhibited outstanding uniform resistive switching voltage and the ON/OFF memory window drastically increased from 10 to 103 without any discernible decline in performance. Moreover, the low-resistance state and high-resistance state operating current values decreased by almost one order and three orders of magnitude, respectively, thereby decreasing the power consumption for the RESET and SET processes by more than three and almost one order of magnitude, respectively. The device also exhibits multilevel resistive switching behavior when varying the applied voltage. Finally, we also developed a 6 6 crossbar array which demonstrated consistent and reliable resistive switching behavior with minimal variation. Hence, our approach holds great promise for producing state-of-the-art non-volatile resistive switching devices.展开更多
Artificial intelligence(AI)processes data-centric applications with minimal effort.However,it poses new challenges to system design in terms of computational speed and energy efficiency.The traditional von Neumann arc...Artificial intelligence(AI)processes data-centric applications with minimal effort.However,it poses new challenges to system design in terms of computational speed and energy efficiency.The traditional von Neumann architecture cannot meet the requirements of heavily datacentric applications due to the separation of computation and storage.The emergence of computing inmemory(CIM)is significant in circumventing the von Neumann bottleneck.A commercialized memory architecture,static random-access memory(SRAM),is fast and robust,consumes less power,and is compatible with state-of-the-art technology.This study investigates the research progress of SRAM-based CIM technology in three levels:circuit,function,and application.It also outlines the problems,challenges,and prospects of SRAM-based CIM macros.展开更多
Sn-doped Ge2Sb2Te5 thin films deposited on Si（100）/SiO2 substrates by rf magnetron sputtering are investigated by a differential scanning calorimeter, x-ray diffraction and sheet resistance measurement. The crystall...Sn-doped Ge2Sb2Te5 thin films deposited on Si（100）/SiO2 substrates by rf magnetron sputtering are investigated by a differential scanning calorimeter, x-ray diffraction and sheet resistance measurement. The crystallization temperatures of the 3.58 at.%, 6.92 at.% and 10.04 at.% Sn-doped Ge2Sb2Te5 thin films have decreases of 5.3, 6.1 and 0.9℃, respectively, which is beneficial to reduce the switching current for the amorphous-to-crystalline phase transition. Due to Sn-doping, the sheet resistance of crystalline Ge2Sb2Te5 thin films increases about 2-10 times, which may be useful to reduce the switching current for the amorphous-to-crystalline phase change. In addition, an obvious decreasing dispersibility for the sheet resistance of Sn-doped Ge2Sb2Te5 thin films in the crystalline state has been observed, which can play an important role in minimizing resistance difference for the phase-change memory cell element arrays.展开更多
We report the experimental phenomenon of large resistance change in plasma oxidized TiOx/TiNx film fabricated on W bottom-electrode-contact （W-BEC） array. The W-BEC in diameter 26Ohm is fabricated by a 0.18μm CMOS ...We report the experimental phenomenon of large resistance change in plasma oxidized TiOx/TiNx film fabricated on W bottom-electrode-contact （W-BEC） array. The W-BEC in diameter 26Ohm is fabricated by a 0.18μm CMOS technology, and the TiOx/TiNx cell array is formed by rf magnetron sputtering and reactive ion etching. In current-voltage （I- V） measurement for current-sweeping mode, large snap-back of voltage is observed, which indicates that the sample changes from high-resistance state （HRS） to low-resistance state （LRS）. In the I-V measurement for voltage-sweeping mode, large current collapse is observed, which indicates that the sample changes from LRS to HRS. The current difference between HRS and LRS is about two orders. The threshold current and voltage for the resistance change is about 5.0- 10^-5 A and 2.5 V, respectively. The pulse voltage can also change the resistance and the pulse time is as shorter as 30 ns for the resistance change. These properties of TiOx/TiNx film are comparable to that of conventional phase-change material, which makes it possible for RRAM application.展开更多
The multiple-state storage capability of phase change memory （PCM） is confirmed by using stacked chalcogenide films as the storage medium. The current-voltage characteristics and the resistance-current characteristi...The multiple-state storage capability of phase change memory （PCM） is confirmed by using stacked chalcogenide films as the storage medium. The current-voltage characteristics and the resistance-current characteristics of the PCM clearly indicate that four states can be stored in this stacked film structure. Qualitative analysis indicates that the multiple-state storage capability of this stacked film structure is due to successive crystallizations in different Si-Sb-Te layers triggered by different amplitude currents.展开更多
Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm depo...Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm deposited by rf magnetron sputtering is used as storage medium for the PCM cell. Large snap-back effect is observed in current-voltage characteristics, indicating the phase transition from an amorphous state （higher resistance state） to the crystalline state （lower resistance state）. The resistance of amorphous state is two orders of magnitude larger than that of the crystalline state from the resistance measurement, and the threshold current needed for phase transition of our fabricated PCM cell array is very low （only several μA）. An x-ray total dose radiation test is carried out on the PCM cell array and the results show that this kind of PCM cell has excellent total dose radiation tolerance with total dose up to 2 ×10^6 rad（Si）, which makes it attractive for space-based applications.展开更多
Electrical properties and phase structures of （Si＋N）-codoped Oe2Sb2Te5 （GST） for phase change memory are investigated to improve the memory performance. Compared to the films with N or Si dopants only in previous...Electrical properties and phase structures of （Si＋N）-codoped Oe2Sb2Te5 （GST） for phase change memory are investigated to improve the memory performance. Compared to the films with N or Si dopants only in previous reports, the （Si＋N）-doped GST has a remarkable improvement of crystalline resistivity of about 104mΩcm. The Fourier-transform infrared spectroscopy spectrum reveals the Si-N bonds formation in the film. X-ray diffraction patterns show that the grain size is reduced due to the crystallization inhibition of the amorphous GST by SiNx, which results in higher crystalline resistivity. This is very useful to reduce writing current for phase change memory applications.展开更多
The tail bits of intermediate resistance states（IRSs） achieved in the SET process（IRSS） and the RESET process（IRSR） of conductive-bridge random-access memory were investigated. Two types of tail bits were observ...The tail bits of intermediate resistance states（IRSs） achieved in the SET process（IRSS） and the RESET process（IRSR） of conductive-bridge random-access memory were investigated. Two types of tail bits were observed, depending on the filament morphology after the SET/RESET operation.（i） Tail bits resulting from lateral diffusion of Cu ions introduced an abrupt increase of device resistance from IRS to ultrahigh-resistance state, which mainly happened in IRSS.（ii） Tail bits induced by the vertical diffusion of Cu ions showed a gradual shift of resistance toward lower value. Statistical results show that more than 95% of tail bits are generated in IRSS. To achieve a reliable IRS for multilevel cell（MLC） operation, it is desirable to program the IRS in RESET operation. The mechanism of tail bit generation that is disclosed here provides a clear guideline for the data retention optimization of MLC resistive random-access memory cells.展开更多
In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing ...In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin（SNM） is specifically designed and irradiated by gamma-ray. Both data sides＇ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side＇s SNM is decreased and the other data side＇s SNM is increased. Moreover, measurement of SNM under different supply voltages（Vdd） reveals that SNM is more sensitive to TID under lower Vdd. The impact of TID on SNM under data retention Vddshould be tested, because Vddof SRAM cell under data retention mode is lower than normal Vdd.The mechanism under the above results is analyzed by measurement of I–V characteristics of SRAM cell transistors.展开更多
This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) unde...This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V_(nsoi)) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V_(psoi)) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V_(DD)=1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design.展开更多
基金supported by the State Key Program of the National Natural Science Foundation of China (Grant No.60836004)the National Natural Science Foundation of China (Grant Nos.61076025 and 61006070)
文摘Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.
基金supported by the National Natural Science Foundation of China(Grant No.61404161)
文摘The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories（MRAMs） with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor（CMOS） process respectively and different magnetic tunneling junctions（MTJs） are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad（Si） in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13-μm process circuit exhibits better radiation tolerance than the 0.18-μm process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.
文摘To test the magnetic signals leaked from the surface of specimens during loading, the experiments of the static tensile of medium carbon 45# steel were carried out. The results show that the magnetic field strength values rapidly vary when the load began, and the curves of the magnetic field strength change from irregularity to regularity with the increase of the load. Furthermore, by comparing with the state of on-line testing, it is found that the magnetic signals of out-of-line testing has more practicability. In the course of loading, though the dots of passing zero of the magnetic field strength continually changed their positions and quantities, the last rupture places were always approached by the dots of passing zero since the elastic loading phase. Some certain relations should exist between external stress and changing of magnetic signals inside the material, and correlative explanation is made based on dislocation theory and the mechanism of magnetic domain action, which provides the basis for further research of magnetic memory.
基金supported by the Open Foundation of State Key Laboratory of Electronic Thin Films and Integrated Devices,China(Grant No.KFJJ201306)
文摘Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed.
文摘Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell＇s static noise margin （SNM） and the background data, and study the influence of irradiation on the probability density function of ASNM, which is the difference between two data sides＇ SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation （STI） oxide rather than from the gate oxide of the micron-device.
基金Project supported by the National Natural Science Foundation of China (Grant No. 60921062)
文摘With the progress of the semiconductor industry,the resistive random-access memory（RAM） has drawn increasing attention.The discovery of the memristor has brought much attention to this study.Research has focused on the resistive switching characteristics of different materials and the analysis of resistive switching mechanisms.We discuss the resistive switching mechanisms of different materials in this paper and analyze the differences of those mechanisms from the view point of circuitry to establish their respective circuit models.Finally,simulations are presented.We give the prospect of using different materials in resistive RAM on account of their resistive switching mechanisms,which are applied to explain their resistive switchings.
基金supported by the National Research Foundation of Korea funded by the Korean Government(grant No.RS-2023-00208801).
文摘As artificial intelligence and big data become increasingly prevalent, resistive random-access memory (RRAM) has become one of the most promising alternatives for storing massive amounts of data. In this study, we employed high-quality crystalline TiN/Al_(2)O_(3)/BaTiO_(3)/Pt RRAM with an optimized thin Al_(2)O_(3) interlayer around 12 nm thick prepared using atomic layer deposition since the thickness of the interlayer affects the memory window size. After insertion of the Al_(2)O_(3) interlayer, the novel RRAM exhibited outstanding uniform resistive switching voltage and the ON/OFF memory window drastically increased from 10 to 103 without any discernible decline in performance. Moreover, the low-resistance state and high-resistance state operating current values decreased by almost one order and three orders of magnitude, respectively, thereby decreasing the power consumption for the RESET and SET processes by more than three and almost one order of magnitude, respectively. The device also exhibits multilevel resistive switching behavior when varying the applied voltage. Finally, we also developed a 6 6 crossbar array which demonstrated consistent and reliable resistive switching behavior with minimal variation. Hence, our approach holds great promise for producing state-of-the-art non-volatile resistive switching devices.
基金the National Key Research and Development Program of China(2018YFB2202602)The State Key Program of the National Natural Science Foundation of China(NO.61934005)+1 种基金The National Natural Science Foundation of China(NO.62074001)Joint Funds of the National Natural Science Foundation of China under Grant U19A2074.
文摘Artificial intelligence(AI)processes data-centric applications with minimal effort.However,it poses new challenges to system design in terms of computational speed and energy efficiency.The traditional von Neumann architecture cannot meet the requirements of heavily datacentric applications due to the separation of computation and storage.The emergence of computing inmemory(CIM)is significant in circumventing the von Neumann bottleneck.A commercialized memory architecture,static random-access memory(SRAM),is fast and robust,consumes less power,and is compatible with state-of-the-art technology.This study investigates the research progress of SRAM-based CIM technology in three levels:circuit,function,and application.It also outlines the problems,challenges,and prospects of SRAM-based CIM macros.
文摘Sn-doped Ge2Sb2Te5 thin films deposited on Si（100）/SiO2 substrates by rf magnetron sputtering are investigated by a differential scanning calorimeter, x-ray diffraction and sheet resistance measurement. The crystallization temperatures of the 3.58 at.%, 6.92 at.% and 10.04 at.% Sn-doped Ge2Sb2Te5 thin films have decreases of 5.3, 6.1 and 0.9℃, respectively, which is beneficial to reduce the switching current for the amorphous-to-crystalline phase transition. Due to Sn-doping, the sheet resistance of crystalline Ge2Sb2Te5 thin films increases about 2-10 times, which may be useful to reduce the switching current for the amorphous-to-crystalline phase change. In addition, an obvious decreasing dispersibility for the sheet resistance of Sn-doped Ge2Sb2Te5 thin films in the crystalline state has been observed, which can play an important role in minimizing resistance difference for the phase-change memory cell element arrays.
基金Supported by the National Basic Research Program of China under Grant No 2006CB302700, the National High Technology Development Programme of China under Grant No 2006AA03Z360~ Chinese Academy of Sciences （Y2005027）, Science and Technology Council of Shanghai under Grant Nos AM0517, 05JC14076, 0552nm043, 06QA14060, 06XD14025, 0652nm003, and 06DZ22017, the China Postdoctoral Science Foundation, and the K. C. Wong Education Foundation （Hong Kong）.
文摘We report the experimental phenomenon of large resistance change in plasma oxidized TiOx/TiNx film fabricated on W bottom-electrode-contact （W-BEC） array. The W-BEC in diameter 26Ohm is fabricated by a 0.18μm CMOS technology, and the TiOx/TiNx cell array is formed by rf magnetron sputtering and reactive ion etching. In current-voltage （I- V） measurement for current-sweeping mode, large snap-back of voltage is observed, which indicates that the sample changes from high-resistance state （HRS） to low-resistance state （LRS）. In the I-V measurement for voltage-sweeping mode, large current collapse is observed, which indicates that the sample changes from LRS to HRS. The current difference between HRS and LRS is about two orders. The threshold current and voltage for the resistance change is about 5.0- 10^-5 A and 2.5 V, respectively. The pulse voltage can also change the resistance and the pulse time is as shorter as 30 ns for the resistance change. These properties of TiOx/TiNx film are comparable to that of conventional phase-change material, which makes it possible for RRAM application.
文摘The multiple-state storage capability of phase change memory （PCM） is confirmed by using stacked chalcogenide films as the storage medium. The current-voltage characteristics and the resistance-current characteristics of the PCM clearly indicate that four states can be stored in this stacked film structure. Qualitative analysis indicates that the multiple-state storage capability of this stacked film structure is due to successive crystallizations in different Si-Sb-Te layers triggered by different amplitude currents.
基金Supported by the Chinese Academy of Sciences （Y2005027）, the Science and Technology Council of Shanghai （AM0517, 0452nm012, 04DZ05612, 04ZR14154, 04JC14080, 05JC14076, AM0414, 05nm05043）, the China Postdoctoral Science Foundation, and the K. C. Wong Education Foundation （Hong Kong）.
文摘Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm deposited by rf magnetron sputtering is used as storage medium for the PCM cell. Large snap-back effect is observed in current-voltage characteristics, indicating the phase transition from an amorphous state （higher resistance state） to the crystalline state （lower resistance state）. The resistance of amorphous state is two orders of magnitude larger than that of the crystalline state from the resistance measurement, and the threshold current needed for phase transition of our fabricated PCM cell array is very low （only several μA）. An x-ray total dose radiation test is carried out on the PCM cell array and the results show that this kind of PCM cell has excellent total dose radiation tolerance with total dose up to 2 ×10^6 rad（Si）, which makes it attractive for space-based applications.
基金Supported by the National Natural Science Foundation of China under Nos 60206005, 60376017, and 60676007, the Shanghai Applied Materials Research and Development Foundation and Silicon Storage Technology, Inc.
文摘Electrical properties and phase structures of （Si＋N）-codoped Oe2Sb2Te5 （GST） for phase change memory are investigated to improve the memory performance. Compared to the films with N or Si dopants only in previous reports, the （Si＋N）-doped GST has a remarkable improvement of crystalline resistivity of about 104mΩcm. The Fourier-transform infrared spectroscopy spectrum reveals the Si-N bonds formation in the film. X-ray diffraction patterns show that the grain size is reduced due to the crystallization inhibition of the amorphous GST by SiNx, which results in higher crystalline resistivity. This is very useful to reduce writing current for phase change memory applications.
基金Project supported by the Ministry of Science and Technology of China(Grant Nos.2016YFA0203800,2016YFA0201803,and 2018YFB0407502)the National Natural Science Foundation of China(Grant Nos.61522408,61334007,and 61521064)+1 种基金Beijing Municipal Science&Technology Commission Program,China(Grant No.Z161100000216153)Huawei Data Center Technology Laboratory
文摘The tail bits of intermediate resistance states（IRSs） achieved in the SET process（IRSS） and the RESET process（IRSR） of conductive-bridge random-access memory were investigated. Two types of tail bits were observed, depending on the filament morphology after the SET/RESET operation.（i） Tail bits resulting from lateral diffusion of Cu ions introduced an abrupt increase of device resistance from IRS to ultrahigh-resistance state, which mainly happened in IRSS.（ii） Tail bits induced by the vertical diffusion of Cu ions showed a gradual shift of resistance toward lower value. Statistical results show that more than 95% of tail bits are generated in IRSS. To achieve a reliable IRS for multilevel cell（MLC） operation, it is desirable to program the IRS in RESET operation. The mechanism of tail bit generation that is disclosed here provides a clear guideline for the data retention optimization of MLC resistive random-access memory cells.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.U1532261 and 11605282)the Opening Fund of Key Laboratory of Silicon Device Technology,Chinese Academy of Sciences Research Projects(Grant No.KLSDTJJ2016-07)
文摘In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin（SNM） is specifically designed and irradiated by gamma-ray. Both data sides＇ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side＇s SNM is decreased and the other data side＇s SNM is increased. Moreover, measurement of SNM under different supply voltages（Vdd） reveals that SNM is more sensitive to TID under lower Vdd. The impact of TID on SNM under data retention Vddshould be tested, because Vddof SRAM cell under data retention mode is lower than normal Vdd.The mechanism under the above results is analyzed by measurement of I–V characteristics of SRAM cell transistors.
基金supported by the National Key Laboratory of Materials Behavior and Evaluation Technology in Space Environment(No.6142910220208)National Natural Science Foundation of China(Nos.12105341 and 12035019)the opening fund of Key Laboratory of Silicon Device and Technology,Chinese Academy of Sciences(No.KLSDTJJ2022-3).
文摘This paper explores the impact of back-gate bias (V_(soi)) and supply voltage (V_(DD)) on the single-event upset (SEU) cross section of 0.18μm configurable silicon-on-insulator static random-access memory (SRAM) under high linear energy transfer heavyion experimentation.The experimental findings demonstrate that applying a negative back-gate bias to NMOS and a positive back-gate bias to PMOS enhances the SEU resistance of SRAM.Specifically,as the back-gate bias for N-type transistors(V_(nsoi)) decreases from 0 to-10 V,the SEU cross section decreases by 93.23%,whereas an increase in the back-gate bias for P-type transistors (V_(psoi)) from 0 to 10 V correlates with an 83.7%reduction in SEU cross section.Furthermore,a significant increase in the SEU cross section was observed with increase in supply voltage,as evidenced by a 159%surge at V_(DD)=1.98 V compared with the nominal voltage of 1.8 V.To explore the physical mechanisms underlying these experimental data,we analyzed the dependence of the critical charge of the circuit and the collected charge on the bias voltage by simulating SEUs using technology computer-aided design.
