In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destinatio...In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.展开更多
Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rat...Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rate(BER)requirement of next-generation ultra-high-speed communications due to the error floor phenomenon.According to the residual error characteristics of LDPC codes,we consider using the high rate Reed-Solomon(RS)codes as the outer codes to construct LDPC-RS product codes to eliminate the error floor and propose the hybrid error-erasure-correction decoding algorithm for the outer code to exploit erasure-correction capability effectively.Furthermore,the overall performance of product codes is improved using iteration between outer and inner codes.Simulation results validate that BER of the product code with the proposed hybrid algorithm is lower than that of the product code with no erasure correction.Compared with other product codes using LDPC codes,the proposed LDPC-RS product code with the same code rate has much better performance and smaller rate loss attributed to the maximum distance separable(MDS)property and significant erasure-correction capability of RS codes.展开更多
A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbo...A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbol vector iteratively in search of a valid codeword in the symbol vector space. Only one symbol is flipped in each iteration, and symbol flipping function, which is employed as the symbol flipping metric, combines the number of failed checks and the reliabilities of the received bits and calculated symbols. A scheme to avoid infinite loops and select one symbol to flip in high order Galois field search is also proposed. The design of flipping pattern＇s order and depth, which is dependent of the computational requirement and error performance, is also proposed and exemplified. Simulation results show that the algorithm achieves an appealing tradeoff between performance and computational requirement over relatively low Galois field for short to medium code length.展开更多
Non-uniform quantization for messages in Low-Density Parity-Check(LDPC)decoding canreduce implementation complexity and mitigate performance loss.But the distribution of messagesvaries in the iterative decoding.This l...Non-uniform quantization for messages in Low-Density Parity-Check(LDPC)decoding canreduce implementation complexity and mitigate performance loss.But the distribution of messagesvaries in the iterative decoding.This letter proposes a variable non-uniform quantized Belief Propaga-tion(BP)algorithm.The BP decoding is analyzed by density evolution with Gaussian approximation.Since the probability density of messages can be well approximated by Gaussian distribution,by theunbiased estimation of variance,the distribution of messages can be tracked during the iteration.Thusthe non-uniform quantization scheme can be optimized to minimize the distortion.Simulation resultsshow that the variable non-uniform quantization scheme can achieve better error rate performance andfaster decoding convergence than the conventional non-uniform quantization and uniform quantizationschemes.展开更多
This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check （QC-LDPC） codes, which not only achieves high hardware utility efficiency （HUE）, but also brings about great me...This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check （QC-LDPC） codes, which not only achieves high hardware utility efficiency （HUE）, but also brings about great memory block reduction without any performance degradation. The main idea is to split the check matrix into several row blocks, then to perform the improved mes- sage passing computations sequentially block by block. As the decoding algorithm improves, the sequential tie between the two-phase computations is broken, so that the two-phase computations can be overlapped which bring in high HUE. Two over- lapping schemes are also presented, each of which suits a different situation. In addition, an efficient memory arrangement scheme is proposed to reduce the great memory block requirement of the LDPC decoder. As an example, for the 0.4 rate LDPC code selected from Chinese Digital TV Terrestrial Broadcasting （DTTB）, our decoding saves over 80% memory blocks com- pared with the conventional decoding, and the decoder achieves 0.97 HUE. Finally, the 0.4 rate LDPC decoder is implemented on an FPGA device EP2S30 （speed grade -5）. Using 8 row processing units, the decoder can achieve a maximum net throughput of 28.5 Mbps at 20 iterations.展开更多
The complexity/performance balanced decoder for low-density parity-check （LDPC） codes is preferred in practical wireless communication systems. A low complexity LDPC decoder for the Consultative Committee for Space ...The complexity/performance balanced decoder for low-density parity-check （LDPC） codes is preferred in practical wireless communication systems. A low complexity LDPC decoder for the Consultative Committee for Space Data Systems （CCSDS） standard is achieved in DSP. An ap- proximate decoding algorithm, normalized rain-sum algorithm, is used in the implementation for its low amounts of computation. To reduce the performance loss caused by the approximation, the pa- rameters of the normalized min-sum algorithm are determined by calculating and finding the mini- mum value of thresholds through density evolution. The minimum value which indicates the best per- formance of the decoding algorithm is corresponding with the optimized parameters. In implementa- tion, the memory cost is saved by decomposing the parity-check matrix into submatrices to store and the computation of passing message in decoding is accelerated by using the intrinsic function of DSP. The performance of the decoder with optimized factors is simulated and compared with the ideal BP decoder. The result shows they have about the same performance.展开更多
This paper extends the class of Low-Density Parity-Check (LDPC) codes that can be constructed from shifted identity matrices. To construct regular LDPC codes, a new method is proposed. Two simple inequations are adopt...This paper extends the class of Low-Density Parity-Check (LDPC) codes that can be constructed from shifted identity matrices. To construct regular LDPC codes, a new method is proposed. Two simple inequations are adopted to avoid the short cycles in Tanner graph, which makes the girth of Tanner graphs at least 8. Because their parity-check matrices are made up of circulant matrices, the new codes are quasi-cyclic codes. They perform well with iterative decoding.展开更多
A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorit...A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorithm （FFT-QSPA）. The flipped position and value are determined by the symbol flipping metric and the received bit values in the first stage WSF algorithm. If the low- eomplexity WSF algorithm is failed, the second stage FFT-QSPA is activated as a switching strategy. Simulation results show that the proposed hybrid algorithm greatly reduces the computational complexity with the performance close to that of FFT-QSPA.展开更多
In this paper, A Belief Propagation concatenated Orderd-Statistic Decoder (BP-OSD) based on accumulated Log-Likelihood Ratio (LLR) is proposed for medium and short lengths Low Density Parity-Check (LDPC) codes coded B...In this paper, A Belief Propagation concatenated Orderd-Statistic Decoder (BP-OSD) based on accumulated Log-Likelihood Ratio (LLR) is proposed for medium and short lengths Low Density Parity-Check (LDPC) codes coded Bit-Interleaved Coded Modulation (BICM) systems. The accumulated soft output values delivered by every BP iteration are used as reliability values of Soft-Input Soft-Output OSD (SISO-OSD) decoder and the soft output of SISO-OSD is used as a priori probabilities of the demodulator for the next iteration. Simulation results show that this improved algorithm achieves noticeable performance gain with only modest increase in computation complexity.展开更多
A new method for the construction of the high performance systematic irregular low-density paritycheck （LDPC） codes based on the sparse generator matrix （G-LDPC） is introduced. The code can greatly reduce the enco...A new method for the construction of the high performance systematic irregular low-density paritycheck （LDPC） codes based on the sparse generator matrix （G-LDPC） is introduced. The code can greatly reduce the encoding complexity while maintaining the same decoding complexity as traditional regular LDPC （H-LDPC） codes defined by the sparse parity check matrix. Simulation results show that the performance of the proposed irregular LDPC codes can offer significant gains over traditional LDPC codes in low SNRs with a few decoding iterations over an additive white Gaussian noise （AWGN） channel.展开更多
In this paper,a family of rate-compatible(RC) low-density parity-check(LDPC) convolutional codes can be obtained from RC-LDPC block codes by graph extension method.The resulted RC-LDPC convolutional codes,which are de...In this paper,a family of rate-compatible(RC) low-density parity-check(LDPC) convolutional codes can be obtained from RC-LDPC block codes by graph extension method.The resulted RC-LDPC convolutional codes,which are derived by permuting the matrices of the corresponding RC-LDPC block codes,are systematic and have maximum encoding memory.Simulation results show that the proposed RC-LDPC convolutional codes with belief propagation(BP) decoding collectively offer a steady improvement on performance compared with the block counterparts over the binary-input additive white Gaussian noise channels(BI-AWGNCs).展开更多
Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community.It is of great importance in both theory and practical communications over noisy channels.The most advantage of...Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community.It is of great importance in both theory and practical communications over noisy channels.The most advantage of LDPC codes is their relatively lower decoding complexity compared with turbo codes,while the disadvantage is its higher encoding complexity.In this paper,a new ap- proach is first proposed to construct high performance irregular systematic LDPC codes based on sparse generator matrix,which can significantly reduce the encoding complexity under the same de- coding complexity as that of regular or irregular LDPC codes defined by traditional sparse parity-check matrix.Then,the proposed generator-based systematic irregular LDPC codes are adopted as con- stituent block codes in rows and columns to design a new kind of product codes family,which also can be interpreted as irregular LDPC codes characterized by graph and thus decoded iteratively.Finally, the performance of the generator-based LDPC codes and the resultant product codes is investigated over an Additive White Gaussian Noise (AWGN) and also compared with the conventional LDPC codes under the same conditions of decoding complexity and channel noise.展开更多
Low-density parity-check （LDPC） codes were first presented by Gallager in 1962. They are linear block codes and their bit error rate （BER） performance approaches remarkably close to the Shannon limit. The LDPC cod...Low-density parity-check （LDPC） codes were first presented by Gallager in 1962. They are linear block codes and their bit error rate （BER） performance approaches remarkably close to the Shannon limit. The LDPC codes created much interest after the rediscovery by Mackay and Neal in 1995. This paper introduces some new LDPC codes by considering some combinatorial structures. We present regular LDPC codes based on group divisible designs which have Tanner graphs free of four-cycles.展开更多
In this paper, both the high-complexity near-ML list decoding and the low-complexity belief propagation decoding are tested for some well-known regular and irregular LDPC codes. The complexity and performance trade-of...In this paper, both the high-complexity near-ML list decoding and the low-complexity belief propagation decoding are tested for some well-known regular and irregular LDPC codes. The complexity and performance trade-off is shown clearly and demonstrated with the paradigm of hybrid decoding. For regular LDPC code, the SNR-threshold performance and error-floor performance could be improved to the optimal level of ML decoding if the decoding complexity is progressively increased, usually corresponding to the near-ML decoding with progressively increased size of list. For irregular LDPC code, the SNR-threshold performance and error-floor performance could only be improved to a bottle-neck even with unlimited decoding complexity. However, with the technique of CRC-aided hybrid decoding, the ML performance could be greatly improved and approached with reasonable complexity thanks to the improved code-weight distribution from the concatenation of CRC and irregular LDPC code. Finally, CRC-aided 5GNR-LDPC code is evaluated and the capacity-approaching capability is shown.展开更多
Aiming at the problems of the complex process of the Turbo decoding algorithm and the large delay in processing the received signal,an adaptive Turbo decoding method based on an improved convolutional neural network( ...Aiming at the problems of the complex process of the Turbo decoding algorithm and the large delay in processing the received signal,an adaptive Turbo decoding method based on an improved convolutional neural network( ATDIC) was proposed in this paper. Firstly,an adaptive unreliable bit and adaptive iteration number method is proposed to simplify the traditional Turbo algorithm. While reducing computational complexity,these refinements still demand considerable computational resources. Leveraging networks exceptional generalization capabilities,strong adaptability,and high parallel process ability,a convolutional neural network( CNN) optimized by Adam's algorithm was employed to predict the Turbo decoding results in this paper,and at the same time,based on the traditional CNN,batch normalization and dropout regularization were performed to accelerate computational speed and mitigate overfitting tendencies inherent in prior approaches. Simulation results show that ATDIC enhances the decoding performance while increasing the decoding rate and reducing resource consumption.展开更多
The problem of improving the performance of linear programming（LP） decoding of low-density parity-check（LDPC） codes is considered in this paper.A multistep linear programming（MLP） algorithm was developed for dec...The problem of improving the performance of linear programming（LP） decoding of low-density parity-check（LDPC） codes is considered in this paper.A multistep linear programming（MLP） algorithm was developed for decoding LDPC codes that includes a slight increase in computational complexity.The MLP decoder adaptively adds new constraints which are compatible with a selected check node to refine the results when an error is reported by the original LP decoder.The MLP decoder result is shown to have the maximum-likelihood（ML） certificate property.Simulations with moderate block length LDPC codes suggest that the MLP decoder gives better performance than both the original LP decoder and the conventional sum-product（SP） decoder.展开更多
基金Supported by the Open Research Fund of National Moblie Communications Research Laboratory of Southeast Uni-versity (No. W200704)
文摘In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.
基金This work was supported in part by National Natural Science Foundation of China(No.61671324)the Director’s Funding from Pilot National Laboratory for Marine Science and Technology(Qingdao)(QNLM201712).
文摘Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rate(BER)requirement of next-generation ultra-high-speed communications due to the error floor phenomenon.According to the residual error characteristics of LDPC codes,we consider using the high rate Reed-Solomon(RS)codes as the outer codes to construct LDPC-RS product codes to eliminate the error floor and propose the hybrid error-erasure-correction decoding algorithm for the outer code to exploit erasure-correction capability effectively.Furthermore,the overall performance of product codes is improved using iteration between outer and inner codes.Simulation results validate that BER of the product code with the proposed hybrid algorithm is lower than that of the product code with no erasure correction.Compared with other product codes using LDPC codes,the proposed LDPC-RS product code with the same code rate has much better performance and smaller rate loss attributed to the maximum distance separable(MDS)property and significant erasure-correction capability of RS codes.
文摘A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbol vector iteratively in search of a valid codeword in the symbol vector space. Only one symbol is flipped in each iteration, and symbol flipping function, which is employed as the symbol flipping metric, combines the number of failed checks and the reliabilities of the received bits and calculated symbols. A scheme to avoid infinite loops and select one symbol to flip in high order Galois field search is also proposed. The design of flipping pattern＇s order and depth, which is dependent of the computational requirement and error performance, is also proposed and exemplified. Simulation results show that the algorithm achieves an appealing tradeoff between performance and computational requirement over relatively low Galois field for short to medium code length.
基金the Aerospace Technology Support Foun-dation of China(No.J04-2005040).
文摘Non-uniform quantization for messages in Low-Density Parity-Check(LDPC)decoding canreduce implementation complexity and mitigate performance loss.But the distribution of messagesvaries in the iterative decoding.This letter proposes a variable non-uniform quantized Belief Propaga-tion(BP)algorithm.The BP decoding is analyzed by density evolution with Gaussian approximation.Since the probability density of messages can be well approximated by Gaussian distribution,by theunbiased estimation of variance,the distribution of messages can be tracked during the iteration.Thusthe non-uniform quantization scheme can be optimized to minimize the distortion.Simulation resultsshow that the variable non-uniform quantization scheme can achieve better error rate performance andfaster decoding convergence than the conventional non-uniform quantization and uniform quantizationschemes.
基金Science and Technology on Avionics Integration Laboratory and Aeronautical Science Foundation of China (20115551022)
文摘This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check （QC-LDPC） codes, which not only achieves high hardware utility efficiency （HUE）, but also brings about great memory block reduction without any performance degradation. The main idea is to split the check matrix into several row blocks, then to perform the improved mes- sage passing computations sequentially block by block. As the decoding algorithm improves, the sequential tie between the two-phase computations is broken, so that the two-phase computations can be overlapped which bring in high HUE. Two over- lapping schemes are also presented, each of which suits a different situation. In addition, an efficient memory arrangement scheme is proposed to reduce the great memory block requirement of the LDPC decoder. As an example, for the 0.4 rate LDPC code selected from Chinese Digital TV Terrestrial Broadcasting （DTTB）, our decoding saves over 80% memory blocks com- pared with the conventional decoding, and the decoder achieves 0.97 HUE. Finally, the 0.4 rate LDPC decoder is implemented on an FPGA device EP2S30 （speed grade -5）. Using 8 row processing units, the decoder can achieve a maximum net throughput of 28.5 Mbps at 20 iterations.
基金Supported by the National Natural Science Foundation of China (61205116)
文摘The complexity/performance balanced decoder for low-density parity-check （LDPC） codes is preferred in practical wireless communication systems. A low complexity LDPC decoder for the Consultative Committee for Space Data Systems （CCSDS） standard is achieved in DSP. An ap- proximate decoding algorithm, normalized rain-sum algorithm, is used in the implementation for its low amounts of computation. To reduce the performance loss caused by the approximation, the pa- rameters of the normalized min-sum algorithm are determined by calculating and finding the mini- mum value of thresholds through density evolution. The minimum value which indicates the best per- formance of the decoding algorithm is corresponding with the optimized parameters. In implementa- tion, the memory cost is saved by decomposing the parity-check matrix into submatrices to store and the computation of passing message in decoding is accelerated by using the intrinsic function of DSP. The performance of the decoder with optimized factors is simulated and compared with the ideal BP decoder. The result shows they have about the same performance.
基金Supported by the Key Project of National Nature Science Foundation of China(No.60390540)
文摘This paper extends the class of Low-Density Parity-Check (LDPC) codes that can be constructed from shifted identity matrices. To construct regular LDPC codes, a new method is proposed. Two simple inequations are adopted to avoid the short cycles in Tanner graph, which makes the girth of Tanner graphs at least 8. Because their parity-check matrices are made up of circulant matrices, the new codes are quasi-cyclic codes. They perform well with iterative decoding.
基金Supported by the National High Technology Research and Development Programme of China(No.2009AAJ128,2009AAJ208,2010AA7010422)
文摘A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorithm （FFT-QSPA）. The flipped position and value are determined by the symbol flipping metric and the received bit values in the first stage WSF algorithm. If the low- eomplexity WSF algorithm is failed, the second stage FFT-QSPA is activated as a switching strategy. Simulation results show that the proposed hybrid algorithm greatly reduces the computational complexity with the performance close to that of FFT-QSPA.
基金Supported by the National Natural Science Foundation of China (No: 60496311)
文摘In this paper, A Belief Propagation concatenated Orderd-Statistic Decoder (BP-OSD) based on accumulated Log-Likelihood Ratio (LLR) is proposed for medium and short lengths Low Density Parity-Check (LDPC) codes coded Bit-Interleaved Coded Modulation (BICM) systems. The accumulated soft output values delivered by every BP iteration are used as reliability values of Soft-Input Soft-Output OSD (SISO-OSD) decoder and the soft output of SISO-OSD is used as a priori probabilities of the demodulator for the next iteration. Simulation results show that this improved algorithm achieves noticeable performance gain with only modest increase in computation complexity.
文摘A new method for the construction of the high performance systematic irregular low-density paritycheck （LDPC） codes based on the sparse generator matrix （G-LDPC） is introduced. The code can greatly reduce the encoding complexity while maintaining the same decoding complexity as traditional regular LDPC （H-LDPC） codes defined by the sparse parity check matrix. Simulation results show that the performance of the proposed irregular LDPC codes can offer significant gains over traditional LDPC codes in low SNRs with a few decoding iterations over an additive white Gaussian noise （AWGN） channel.
基金the National Natural Science Foundation of China(Nos.61401164,61471131 and 61201145)the Natural Science Foundation of Guangdong Province(No.2014A030310308)
文摘In this paper,a family of rate-compatible(RC) low-density parity-check(LDPC) convolutional codes can be obtained from RC-LDPC block codes by graph extension method.The resulted RC-LDPC convolutional codes,which are derived by permuting the matrices of the corresponding RC-LDPC block codes,are systematic and have maximum encoding memory.Simulation results show that the proposed RC-LDPC convolutional codes with belief propagation(BP) decoding collectively offer a steady improvement on performance compared with the block counterparts over the binary-input additive white Gaussian noise channels(BI-AWGNCs).
基金Supported by the National Aeronautical Foundation of Science and Research of China (No.04F52041)the Natural Science Foundation of Jiangsu Province (No.BK2006188).
文摘Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community.It is of great importance in both theory and practical communications over noisy channels.The most advantage of LDPC codes is their relatively lower decoding complexity compared with turbo codes,while the disadvantage is its higher encoding complexity.In this paper,a new ap- proach is first proposed to construct high performance irregular systematic LDPC codes based on sparse generator matrix,which can significantly reduce the encoding complexity under the same de- coding complexity as that of regular or irregular LDPC codes defined by traditional sparse parity-check matrix.Then,the proposed generator-based systematic irregular LDPC codes are adopted as con- stituent block codes in rows and columns to design a new kind of product codes family,which also can be interpreted as irregular LDPC codes characterized by graph and thus decoded iteratively.Finally, the performance of the generator-based LDPC codes and the resultant product codes is investigated over an Additive White Gaussian Noise (AWGN) and also compared with the conventional LDPC codes under the same conditions of decoding complexity and channel noise.
基金Supported by the National Natural Science Foundation of China(Grant Nos.1107105611201114)
文摘Low-density parity-check （LDPC） codes were first presented by Gallager in 1962. They are linear block codes and their bit error rate （BER） performance approaches remarkably close to the Shannon limit. The LDPC codes created much interest after the rediscovery by Mackay and Neal in 1995. This paper introduces some new LDPC codes by considering some combinatorial structures. We present regular LDPC codes based on group divisible designs which have Tanner graphs free of four-cycles.
文摘In this paper, both the high-complexity near-ML list decoding and the low-complexity belief propagation decoding are tested for some well-known regular and irregular LDPC codes. The complexity and performance trade-off is shown clearly and demonstrated with the paradigm of hybrid decoding. For regular LDPC code, the SNR-threshold performance and error-floor performance could be improved to the optimal level of ML decoding if the decoding complexity is progressively increased, usually corresponding to the near-ML decoding with progressively increased size of list. For irregular LDPC code, the SNR-threshold performance and error-floor performance could only be improved to a bottle-neck even with unlimited decoding complexity. However, with the technique of CRC-aided hybrid decoding, the ML performance could be greatly improved and approached with reasonable complexity thanks to the improved code-weight distribution from the concatenation of CRC and irregular LDPC code. Finally, CRC-aided 5GNR-LDPC code is evaluated and the capacity-approaching capability is shown.
基金supported by the Science and Technology Innovation 2030-Major Project,China (2022ZD0119001)。
文摘Aiming at the problems of the complex process of the Turbo decoding algorithm and the large delay in processing the received signal,an adaptive Turbo decoding method based on an improved convolutional neural network( ATDIC) was proposed in this paper. Firstly,an adaptive unreliable bit and adaptive iteration number method is proposed to simplify the traditional Turbo algorithm. While reducing computational complexity,these refinements still demand considerable computational resources. Leveraging networks exceptional generalization capabilities,strong adaptability,and high parallel process ability,a convolutional neural network( CNN) optimized by Adam's algorithm was employed to predict the Turbo decoding results in this paper,and at the same time,based on the traditional CNN,batch normalization and dropout regularization were performed to accelerate computational speed and mitigate overfitting tendencies inherent in prior approaches. Simulation results show that ATDIC enhances the decoding performance while increasing the decoding rate and reducing resource consumption.
基金Supported by the National Key Basic Research and Development (973) Program of China (No.2009CB320300)
文摘The problem of improving the performance of linear programming（LP） decoding of low-density parity-check（LDPC） codes is considered in this paper.A multistep linear programming（MLP） algorithm was developed for decoding LDPC codes that includes a slight increase in computational complexity.The MLP decoder adaptively adds new constraints which are compatible with a selected check node to refine the results when an error is reported by the original LP decoder.The MLP decoder result is shown to have the maximum-likelihood（ML） certificate property.Simulations with moderate block length LDPC codes suggest that the MLP decoder gives better performance than both the original LP decoder and the conventional sum-product（SP） decoder.
