The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for thre...The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.展开更多
Quantum-dot cellular automaton (QCA) is a novel nanotechnology that provides a very different computation platform than traditional CMOS, in which polarization of electrons indicates the digital information. This pape...Quantum-dot cellular automaton (QCA) is a novel nanotechnology that provides a very different computation platform than traditional CMOS, in which polarization of electrons indicates the digital information. This paper demonstrates designing combinational circuits based on quantum-dot cellular automata (QCA) nanotechnology, which offers a way to implement logic and all interconnections with only one homogeneous layer of cells. In this paper, the authors have proposed a novel design of XOR gate. This model proves designing capabilities of combinational circuits that are compatible with QCA gates within nano-scale. Novel adder circuits such as half adders, full adders, which avoid the fore, mentioned noise paths, crossovers by careful clocking organization, have been proposed. Experiment results show that the performance of proposed designs is more efficient than conventional designs. The modular layouts are verified with the freely available QCA Designer tool.展开更多
Quantum full adders play a key role in the design of quantum computers.The efficiency of a quantum adder directly determines the speed of the quantum computer,and its complexity is closely related to the difficulty an...Quantum full adders play a key role in the design of quantum computers.The efficiency of a quantum adder directly determines the speed of the quantum computer,and its complexity is closely related to the difficulty and the cost of building a quantum computer.The existed full adder based on R gate is a great design but it is not suitable to construct a quantum multiplier.We show the quantum legitimacy of some common reversible gates,then use R gate to propose a new design of a quantum full adder.We utilize the new designed quantum full adder to optimize the quantum multiplier which is based on R gate.It is shown that the new designed one can be optimized by a local optimization rule so that it will have lower quantum cost than before.展开更多
The authors present an analysis of the fault tolerant properties and the effects of temperature on an exclusive OR (XOR) gate and a full adder device implemented using quantum-dot cellular automata (QCA) structures. A...The authors present an analysis of the fault tolerant properties and the effects of temperature on an exclusive OR (XOR) gate and a full adder device implemented using quantum-dot cellular automata (QCA) structures. A Hubbard-type Hamiltonian and the Inter-cellular Hartree approximation have been used for modeling, and a uniform random distribution has been implemented for the simulated dot displacements within cells. We have shown characteristic features of all four possible input configurations for the XOR device. The device performance degrades significantly as the magnitude of defects and the temperature increase. Our results show that the fault-tolerant characteristics of an XOR device are highly dependent on the input configurations. The input signal that travels through the wire crossing (also called a crossover) in the central part of the device weakens the signal significantly. The presence of multiple wire crossings in the full adder design has a major impact on the functionality of the device. Even at absolute zero temperature, the effect of the dot displacement defect is very significant. We have observed that the breakdown characteristic is much more pronounced in the full adder than in any other devices under investigation.展开更多
量子全加器是量子计算机的基本单元,为了减少能耗,降低构造成本及物理实现难度,本文提出一种新型 n 位量子全加器,使用 3n 个CNOT(Controlled NOT)门和 2n -1个Toffoli门实现 n 位量子加减法,采用超前进位方式,不含进位输入,通过最高溢...量子全加器是量子计算机的基本单元,为了减少能耗,降低构造成本及物理实现难度,本文提出一种新型 n 位量子全加器,使用 3n 个CNOT(Controlled NOT)门和 2n -1个Toffoli门实现 n 位量子加减法,采用超前进位方式,不含进位输入,通过最高溢出标志位判断加法的进位和减法的正负号,标志位不参与高低位计算,不增加电路延时,适合 n 位量子并行计算.随机生成4、8、16和32位数分别进行加减仿真操作,验证了全加器的正确性.该全加器量子代价较低,结构简单,有利于提高集成电路规模和集成度.展开更多
The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata（QCA）. Even though many efficient arithmetic circuits were ...The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata（QCA）. Even though many efficient arithmetic circuits were designed using QCA, there is still a challenge to implement high-speed circuits in an optimized manner.Among these circuits, one of the essential structures is a parallel multi-digit decimal adder unit with significant speed which is very attractive for future environments. To achieve high speed, a new correction logic formulation method is proposed for single and multi-digit BCD adder. The proposed enhanced single-digit BCD adder（ESDBA）is 26% faster than the carry flow adder（CFA）-based BCD adder. The multi-digit operations are also performed using the proposed ESDBA, which is cascaded innovatively. The enhanced multi-digit BCD adder（EMDBA） performs two 4-digit and two 8-digit BCD addition 50% faster than the CFA-based BCD adder with the nominal overhead of the area. The EMDBA performs two 4-digit BCD addition 24% faster with 23% decrease in the area, similarly for 8-digit operation the EMDBA achieves 36% increase in speed with 21% less area compared to the existing carry look ahead（CLA）-based BCD adder design. The proposed multi-digit adder produces significantly less delay of（N – 1）＋3.5 clock cycles compared to the N＊One digit BCD adder delay required by the conventional BCD adder method. It is observed that as per our knowledge this is the first innovative proposal for multi-digit BCD addition using QCA.展开更多
基金State Key Lab of Processors,Institute of Computing Technology,Chinese Academy of Sciences(CLQ202516)the Fundamental Research Funds for the Central Universities of China(3282025047,3282024051,3282024009)。
文摘The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.
文摘Quantum-dot cellular automaton (QCA) is a novel nanotechnology that provides a very different computation platform than traditional CMOS, in which polarization of electrons indicates the digital information. This paper demonstrates designing combinational circuits based on quantum-dot cellular automata (QCA) nanotechnology, which offers a way to implement logic and all interconnections with only one homogeneous layer of cells. In this paper, the authors have proposed a novel design of XOR gate. This model proves designing capabilities of combinational circuits that are compatible with QCA gates within nano-scale. Novel adder circuits such as half adders, full adders, which avoid the fore, mentioned noise paths, crossovers by careful clocking organization, have been proposed. Experiment results show that the performance of proposed designs is more efficient than conventional designs. The modular layouts are verified with the freely available QCA Designer tool.
基金Project supported by the National Natural Science Foundation of China(Grant No.11861031).
文摘Quantum full adders play a key role in the design of quantum computers.The efficiency of a quantum adder directly determines the speed of the quantum computer,and its complexity is closely related to the difficulty and the cost of building a quantum computer.The existed full adder based on R gate is a great design but it is not suitable to construct a quantum multiplier.We show the quantum legitimacy of some common reversible gates,then use R gate to propose a new design of a quantum full adder.We utilize the new designed quantum full adder to optimize the quantum multiplier which is based on R gate.It is shown that the new designed one can be optimized by a local optimization rule so that it will have lower quantum cost than before.
文摘The authors present an analysis of the fault tolerant properties and the effects of temperature on an exclusive OR (XOR) gate and a full adder device implemented using quantum-dot cellular automata (QCA) structures. A Hubbard-type Hamiltonian and the Inter-cellular Hartree approximation have been used for modeling, and a uniform random distribution has been implemented for the simulated dot displacements within cells. We have shown characteristic features of all four possible input configurations for the XOR device. The device performance degrades significantly as the magnitude of defects and the temperature increase. Our results show that the fault-tolerant characteristics of an XOR device are highly dependent on the input configurations. The input signal that travels through the wire crossing (also called a crossover) in the central part of the device weakens the signal significantly. The presence of multiple wire crossings in the full adder design has a major impact on the functionality of the device. Even at absolute zero temperature, the effect of the dot displacement defect is very significant. We have observed that the breakdown characteristic is much more pronounced in the full adder than in any other devices under investigation.
文摘量子全加器是量子计算机的基本单元,为了减少能耗,降低构造成本及物理实现难度,本文提出一种新型 n 位量子全加器,使用 3n 个CNOT(Controlled NOT)门和 2n -1个Toffoli门实现 n 位量子加减法,采用超前进位方式,不含进位输入,通过最高溢出标志位判断加法的进位和减法的正负号,标志位不参与高低位计算,不增加电路延时,适合 n 位量子并行计算.随机生成4、8、16和32位数分别进行加减仿真操作,验证了全加器的正确性.该全加器量子代价较低,结构简单,有利于提高集成电路规模和集成度.
基金Supported by the State Key Development Program for Basic Research of China(2006CB716204)by the International Corpora-tion Project from the Education Department of China 20060360563)the Key Laboratory of Advanced Photonic and Electronic Materials of Jiangsu Province(BM2003202)
文摘The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata（QCA）. Even though many efficient arithmetic circuits were designed using QCA, there is still a challenge to implement high-speed circuits in an optimized manner.Among these circuits, one of the essential structures is a parallel multi-digit decimal adder unit with significant speed which is very attractive for future environments. To achieve high speed, a new correction logic formulation method is proposed for single and multi-digit BCD adder. The proposed enhanced single-digit BCD adder（ESDBA）is 26% faster than the carry flow adder（CFA）-based BCD adder. The multi-digit operations are also performed using the proposed ESDBA, which is cascaded innovatively. The enhanced multi-digit BCD adder（EMDBA） performs two 4-digit and two 8-digit BCD addition 50% faster than the CFA-based BCD adder with the nominal overhead of the area. The EMDBA performs two 4-digit BCD addition 24% faster with 23% decrease in the area, similarly for 8-digit operation the EMDBA achieves 36% increase in speed with 21% less area compared to the existing carry look ahead（CLA）-based BCD adder design. The proposed multi-digit adder produces significantly less delay of（N – 1）＋3.5 clock cycles compared to the N＊One digit BCD adder delay required by the conventional BCD adder method. It is observed that as per our knowledge this is the first innovative proposal for multi-digit BCD addition using QCA.
