Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. A...Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. Architecture-level power conscious design must go beyond low-level circuit design. Architectural power and performance tradeoff should be considered at the same time. Simulation is an efficient method to design modem network processor before making chip. In order to achieve the tradeoff between performance and power, the processor simulator is used to design the architecture of network processor. Using Netbeneh, Commubench benchmark and processor simulator-SimpleScalar, the performance and power of network processor are quantitatively evaluated. New performance tradeoff evaluation metric is proposed to analyze the architecture of network processor. Based on the high performance lnteI IXP 2800 Network processor eonfignration, optimized instruction fetch width and speed ,instruction issue width, instruction window size are analyzed and selected. Simulation resuits show that the tradeoff design method makes the usage of network processor more effectively. The optimal key parameters of network processor are important in architecture-level design. It is meaningful for the next generation network processor design.展开更多
面对日益复杂的处理器设计和有限的设计周期,如何有效地快速进行性能评估,是每一个处理器设计团队需要解决的问题。完整的性能测试集需要运行较长的时间,特别是在硅前验证阶段,高昂的时间成本导致设计团队无法使用完整的性能测试集进行...面对日益复杂的处理器设计和有限的设计周期,如何有效地快速进行性能评估,是每一个处理器设计团队需要解决的问题。完整的性能测试集需要运行较长的时间,特别是在硅前验证阶段,高昂的时间成本导致设计团队无法使用完整的性能测试集进行性能评估分析。文中介绍了一种通用处理器快速性能评测方法(Fast-Eval),Fast-Eval性能评测方法基于SimPoint技术,使用FastParallel-BBV方法、最优模拟点的选取以及模拟点的热迁移等方法,显著缩短了BBV生成时间和性能测试时间。实验结果表明,相比完整运行SPEC CPU 2006 REF数据规模测试程序获得的性能数据,所提方法在ARM64处理器上BBV生成时间缩短为原来的16.88%,性能评估时间缩短为原来的1.26%,性能评估结果的平均相对误差为0.53%;在FPGA开发板上测试集的平均相对误差可以达到0.40%,运行时间仅为完整运行时间的0.93%。展开更多
基金Sponsored by the National Defence Research Foundation of China(Grant No.413460303).
文摘Network processors are used in the core node of network to flexibly process packet streams. With the increase of performance, the power of network processor increases fast, and power and cooling become a bottleneck. Architecture-level power conscious design must go beyond low-level circuit design. Architectural power and performance tradeoff should be considered at the same time. Simulation is an efficient method to design modem network processor before making chip. In order to achieve the tradeoff between performance and power, the processor simulator is used to design the architecture of network processor. Using Netbeneh, Commubench benchmark and processor simulator-SimpleScalar, the performance and power of network processor are quantitatively evaluated. New performance tradeoff evaluation metric is proposed to analyze the architecture of network processor. Based on the high performance lnteI IXP 2800 Network processor eonfignration, optimized instruction fetch width and speed ,instruction issue width, instruction window size are analyzed and selected. Simulation resuits show that the tradeoff design method makes the usage of network processor more effectively. The optimal key parameters of network processor are important in architecture-level design. It is meaningful for the next generation network processor design.
文摘仿真点(simulation point,SimPoint)作为一种代表性采样技术被广泛应用于处理器硅前性能评估中。SimPoint为每个待评估的程序根据贝叶斯信息准则确定仿真点数目。然而,标准测试集内不同程序有着不同的行为复杂程度,需要不同数目的仿真点来准确刻画其程序行为。SimPoint无法识别出不同程序间的复杂度差异,无法做到在总仿真点数目一定的情况下,将更多的仿真点分配给行为复杂的程序以降低这些程序的性能评估误差,将更少的仿真点分配给行为简单的程序而不损失这些程序的性能评估精度。由于没有在测试集内合理地进行仿真点分配,SimPoint虽然可以给出比较准确的平均性能评估误差,但是某些行为复杂的测试子项的性能评估误差依然较大。针对这一问题,本文优化了SimPoint的仿真点局部分配方式,提出了一种全局贪心分配方法———贪心点(greedy point,GreedyPoint)方法。该方法将仿真点的分配问题抽象为含约束的优化问题,使用微架构无关特征计算表征误差,通过全局贪心算法来求解该优化问题。实验数据表明,在相同仿真开销下,与SimPoint相比,GreedyPoint可以将SPEC CPU 2017测试套件的平均性能评估误差由3.23%降低到2.08%,最大性能评估误差由21.22%大幅降低至7.01%。
文摘面对日益复杂的处理器设计和有限的设计周期,如何有效地快速进行性能评估,是每一个处理器设计团队需要解决的问题。完整的性能测试集需要运行较长的时间,特别是在硅前验证阶段,高昂的时间成本导致设计团队无法使用完整的性能测试集进行性能评估分析。文中介绍了一种通用处理器快速性能评测方法(Fast-Eval),Fast-Eval性能评测方法基于SimPoint技术,使用FastParallel-BBV方法、最优模拟点的选取以及模拟点的热迁移等方法,显著缩短了BBV生成时间和性能测试时间。实验结果表明,相比完整运行SPEC CPU 2006 REF数据规模测试程序获得的性能数据,所提方法在ARM64处理器上BBV生成时间缩短为原来的16.88%,性能评估时间缩短为原来的1.26%,性能评估结果的平均相对误差为0.53%;在FPGA开发板上测试集的平均相对误差可以达到0.40%,运行时间仅为完整运行时间的0.93%。
