Stress voltages on time-dependent breakdown characteristics of GaN MIS-HEMTs during negative gate bias stress (with VGS < 0, VD = VS = 0) and off-state stress (VG < VTh, VDS > 0, VS = 0) are investigated. For...Stress voltages on time-dependent breakdown characteristics of GaN MIS-HEMTs during negative gate bias stress (with VGS < 0, VD = VS = 0) and off-state stress (VG < VTh, VDS > 0, VS = 0) are investigated. For negative bias stress, the breakdown time distribution (β) decreases with the increasing negative gate voltage, while β is larger for higher drain voltage at off-state stress. Two humps in the time-dependent gate leakage occurred under both breakdown conditions, which can be ascribed to the dielectric breakdown triggered earlier and followed by the GaN layer breakdown. Combining the electric distribution from simulation and long-term monitoring of electric parameter, the peak electric fields under the gate edges at source and drain sides are confirmed as the main formation locations for per-location paths during negative gate voltage stress and off-state stress, respectively.展开更多
A novel n-type junctionless field-effect transistor(JLFET) with a step-gate-oxide(SGO) structure is proposed to suppress the gate-induced drain leakage(GIDL) effect and off-state current I_(off).Introducing a 6-nm-thi...A novel n-type junctionless field-effect transistor(JLFET) with a step-gate-oxide(SGO) structure is proposed to suppress the gate-induced drain leakage(GIDL) effect and off-state current I_(off).Introducing a 6-nm-thick tunnel-gateoxide and maintaining 3-nm-thick control-gate-oxide,lateral band-to-band tunneling(L-BTBT) width is enlarged and its tunneling probability is reduced at the channel-drain surface,leading the off-state current I_(off) to decrease finally.Also,the thicker tunnel-gate-oxide can reduce the influence on the total gate capacitance of JLFET,which could alleviate the capacitive load of the transistor in the circuit applications.Sentaurus simulation shows that I_(off) of the new optimized JLFET reduced significantly with little impaction on its on-state current Ion and threshold voltage V_(TH) becoming less,thus showing an improved I_(on)/I_(off) ratio(5×10^(4)) and subthreshold swing(84 mV/dec),compared with the scenario of the normal JLFET.The influence of the thickness and length of SGO structure on the performance of JLFET are discussed in detail,which could provide useful instruction for the device design.展开更多
基金Project supported by the National Key Research and Development Program,China(Grant No.2017YFB0402800)the Key Research and Development Program of Guangdong Province,China(Grant Nos.2019B010128002 and 2020B010173001)+4 种基金the National Natural Science Foundation of China(Grant No.U1601210)the Natural Science Foundation of Guangdong Province,China(Grant No.2015A030312011)the Open Project of Key Laboratory of Microelectronic Devices and Integrated Technology(Grant No.202006)the Science and Technology Plan of Guangdong Province,China(Grant No.2017B010112002)the China Postdoctoral Science Foundation(Grant No.2019M663233).
文摘Stress voltages on time-dependent breakdown characteristics of GaN MIS-HEMTs during negative gate bias stress (with VGS < 0, VD = VS = 0) and off-state stress (VG < VTh, VDS > 0, VS = 0) are investigated. For negative bias stress, the breakdown time distribution (β) decreases with the increasing negative gate voltage, while β is larger for higher drain voltage at off-state stress. Two humps in the time-dependent gate leakage occurred under both breakdown conditions, which can be ascribed to the dielectric breakdown triggered earlier and followed by the GaN layer breakdown. Combining the electric distribution from simulation and long-term monitoring of electric parameter, the peak electric fields under the gate edges at source and drain sides are confirmed as the main formation locations for per-location paths during negative gate voltage stress and off-state stress, respectively.
基金Project supported by the National Natural Science Foundation of China(Grant No.61704130)the Fund from the Science and Technology on Analog Integrated Circuit Laboratory,China(Grant No.JCKY2019210C029)。
文摘A novel n-type junctionless field-effect transistor(JLFET) with a step-gate-oxide(SGO) structure is proposed to suppress the gate-induced drain leakage(GIDL) effect and off-state current I_(off).Introducing a 6-nm-thick tunnel-gateoxide and maintaining 3-nm-thick control-gate-oxide,lateral band-to-band tunneling(L-BTBT) width is enlarged and its tunneling probability is reduced at the channel-drain surface,leading the off-state current I_(off) to decrease finally.Also,the thicker tunnel-gate-oxide can reduce the influence on the total gate capacitance of JLFET,which could alleviate the capacitive load of the transistor in the circuit applications.Sentaurus simulation shows that I_(off) of the new optimized JLFET reduced significantly with little impaction on its on-state current Ion and threshold voltage V_(TH) becoming less,thus showing an improved I_(on)/I_(off) ratio(5×10^(4)) and subthreshold swing(84 mV/dec),compared with the scenario of the normal JLFET.The influence of the thickness and length of SGO structure on the performance of JLFET are discussed in detail,which could provide useful instruction for the device design.
